Yes. PSoC can be used as a clock generator. But the output frequency will be limited to 12MHz because of the GPIO frequency limit. Any other clock values lower than 12MHz are possible. The clocks may be generated by dividing he 24MHz SysClk using VC1, VC2, VC3 and / or Counter user modules. Also, to bring out the clocks configured using VC1, VC2 or VC3, the DigBuf user module may be used.
After Power On, it takes 16mS plus the time taken to execute the boot.asm code for the output to be available on the pin. The time taken by boot.asm code depends on the amount of resources to be configured in the chip and will be 15mS typical and 34mS max.