Question: What will be the output voltage seen across the Vdd_1.8 pin [pin 36] of the CYRF69103 chip with it’s the Power Management Unit (PMU) disabled and an external boost to supply power to the device?
The output voltage seen across the pin will be 1.8 volts.
- The PMU which helps in configuring the output voltage (VREG) to several minimum values between 2.4 V and 2.7 V
- Low voltage indication(LVI) and
- Low Drop out Regulator (LDO) which supplies the regulated 1.8 V for the internal logic.
When the PMU is disabled, the 1st two functions (option to select the VREG and LVI) are disabled. But it does not disable the 3rd function, LDO. The LDO will on and its output is connected to the Vdd_1.8 and hence the output voltage across the pin is ~1.8 V.