Translation - Japanese: FX3 UARTがJTAGデバッグ中に不要なデータを出力する - KBA86728 - Community Translated (JA)
Question: When debugging the FX3 firmware through a JTAG interface (as described in chapter 3 of the EzUsbSuite_UG.pdf), the UART sends out garbage data. However, it works correctly during normal firmware execution on the board (without JTAG debug). Why?
This is most likely due to an incorrect initialization command passed when setting up the debug environment in Eclipse. FX3 CPU clock must be set correctly during JTAG initialization to avoid the transmission of garbage data through UART.
Add the command corresponding to the required input clock setting to the Startup tab of Debug Configurations settings as shown in Figure 1.
- For 19.2 MHz, monitor memU32 0xE0052000 = 0x00080015
- For 26.0 MHz, monitor memU32 0xE0052000 = 0x00080010
- For 38.4 MHz, monitor memU32 0xE0052000 = 0x00080115
- For 52.0 MHz, monitor memU32 0xE0052000 = 0x00080110
Figure 1. Startup Tab of Debug Configurations Settings
The command “monitor sleep 1000” is used to stabilize the clock.