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Question: Using the AMUX8 User Module along with AMUX4/AMUX8 Components in adjacent columns in PSoC® Designer™ sometimes causes incorrect input channel selection. What is the reason for this, and how can this issue be avoided?
Answer: The AMUX8 User Module uses the following multiplexers to perform multiplexing of eight inputs:
- Two Analog Column Input Muxes on two adjacent columns. These are 4x1 multiplexers.
- An Analog Column Input Select Mux on the column on which the AMUX8 User Module is placed. This is a 2x1 multiplexer.
For selecting one out of the eight inputs, the user module first configures an input from one of the two Analog Column Input Muxes based on whether the input required is an even-pin input (P0[0], P0[2], P0[4], or P0[6]) or an odd-pin input (P0[1], P0[3], P0[5], or P0[7]). Then, the user module configures the Analog Column Input Select Mux such that the output of either the even-pin mux or the odd-pin mux is selected as the final output of the AMUX8.
When using another AMUX component (AMUX4/AMUX8) in the adjacent analog column, that AMUX would share one of the Analog Column Input Muxes that is used by the first AMUX8 Component. So, when you try to select an input using the second AMUX Component, the configuration of the Analog Column Input Mux would be changed as required for this second input selection. This would corrupt the Analog Column Input Mux configuration required by the first AMUX8 Component. Thus, the intended input channel is no longer routed by the first AMUX8 Component.
To avoid this issue:
Note that this problem occurs only when both of the AMUX Components try to access two different even-pin inputs (or two different odd-pin inputs) at the same time. So make sure that you use one even-pin and one odd-pin input in such cases. If it is necessary to use two different even-pin inputs (or two different odd-pin inputs) at the same time, the analog columns ‘1’ and ‘2’ can be used. The AMUX Components placed on these columns use independent 4x1 multiplexers and do not cause the above problem. The above problem is applicable only to analog column pairs ‘0 and 1’ and ‘2 and 3’.
