Translation - Japanese: tACEとtDOEの違い – KBA92092 - Community Translated (JA)
Question: What are the timing parameters of tDOE and tACE for an Asynchronous SRAM? When should you assert /CE and /OE so that you get valid data in tACE and tDOE time during a read operation?
On asserting OE/ signal low, tDOE is the maximum time within which the data will be available on the data bus, while tACE is the maximum time within which the data will be available on the data bus after asserting CE/ signal low.
Asserting /CE and /OE:
- If you assert /CE at least (tACE – tDOE) time ahead of /OE as shown in Figure 1, the data will come after tDOE from the falling edge of /OE.
Figure 1. /CE Asserted Ahead of /OE, Data Valid After tDOE
- If you assert both /CE and /OE together, it will take tACE time from the /CE or /OE falling edge for valid data to come on the bus. This condition is shown in Figure 2.
Figure 2. /CE and /OE Asserted Together, Data Valid After tACE
tACE time involves the time taken to access the particular data location internally and also the time taken to push the data out of the I/O buffers. tDOE is just the time taken for the data that is already present at the I/O buffers to be available on the bus. So tACE is always higher than tDOE.