Translation - Japanese: F-RAMプリチャージ操作 - KBA203628 - Community Translated (JA)
What is the pre-charge operation in Cypress parallel F-RAM? How does it work? What will happen if the pre-charge time (tPC) is not met while accessing parallel F-RAM?
Pre-charge is an internal condition in F-RAM in which the memory is conditioned for new access. A pre-charge operation in F-RAM is initiated under any of the following conditions:
- Driving chip enable signal /CE to HIGH
- Changing the upper address bits (for example, A16-A3 for the device FM28V100)
Once the pre-charge operation is initiated, it takes tPC time to complete. Due to destructive nature of reads in F-RAM, data in F-RAM cells will be lost if they are not written back. The pre-charge operation ensures that the data is written back into F-RAM cells safely. It is achieved by using an internal buffer. For each access (read/write), F-RAM reads the desired row of data from the memory cells to an internal buffer. The data is output from the internal buffer in a read operation or modified in internal buffer for a write operation. This is written back to the F-RAM cells during pre-charge operation. The pre-charge operation is explained below with an example.
Consider an F-RAM with a row size of 8 bytes (for example, FM28V100). To read data from a second address location (0x0002), F-RAM will read the first row from the F-RAM memory array to an internal buffer and output the data from the second location of this internal buffer. If the next access is to read the address location 0x0005, the F-RAM will output data from the 5 th location of the internal buffer, which already contains the correct data because the memory row is not changed. If the next access is to the address location 0x0009, which belongs to the second row of the memory array, F-RAM will write back the first row from the internal buffer to the array and then read the second row into the internal buffer. The data is output from the first location of the internal buffer (which corresponds to 0x0009). Writing the data back to F-RAM array also happens when the chip is deselected (/CE HIGH).
To write data to 3rd location (0x0003), F-RAM reads the first row from the F-RAM memory array to the internal buffer and then modifies the 3rd location of the internal buffer to the data to be written. F-RAM then writes back the internal buffer to the F-RAM array when the chip is deselected or access to another row is initiated.
The pre-charge time (tPC) should be met after each access. Not meeting the pre-charge time when the chip is deselected or when a different row is accessed may result in memory corruption.