Troubleshooting PSoC® 3/4/5LP Programming/Debugging Issues - KBA210619

Version: *A

 

  • Different firmware upgrade methods.
    • Programming Using MiniProg3 (CY8CKIT-002) or DVKProg/KitProg.
    • HSSP using an external microcontroller
    • Production Programming.
    • Bootloading.

 

  • Troubleshooting Programming Failures
    • Firmware and programmer settings.
      • PSoC Programmer Settings 
      • PSoC Creator – Program/Debug Settings 
      • PSoC Creator Setting for JTAG Protocol
      • PSoC Programmer / PSoC Creator not detecting MiniProg3 
      • Software Version 
      • Potential hardware bugs that might cause programming failures 
      • Device-Specific Issues 

  • FAQs
    • Where do I find the hex file in a PSoC Creator project?
    • Where do I find the checksum in the hex file?
    • Can I use USB pins in PSoC 3 and PSoC 5LP devices to program? 
    • Can I use P3[0] and P3[1] of PSoC 4000 family of devices for I2C connection? 
    • My device is programmed in PSoC Creator; however it fails to program with PSoC Programmer.
    • Why can I not find the device in the device family in PSoC Programmer? 
    • Can I debug with “Debug Select” option set to “GPIO” in PSoC Creator? 
    • How do I use MiniProg3 when the board is self-powered (not powered from MiniProg3)? 
    • MiniProg3 is detected in PSoC Programmer/PSoC Creator, but not getting connected.
    • Will the debugging session be lost if I reset the device while debugging?
    • What should be the configuration of programming/debugging pins to have smaller sleep current?
    • If I disconnect MiniProg3 from the PC but leave it connected to the board, firmware does not run.
    • If I connect MiniProg3, will there be higher current consumption on the board?
    • Can I connect multiple devices on an SWD port?
    • How do I convert hex file to SVF format?
    • How to program chip scale package (CSP) devices?
    • How do I perform production programming for PSoC devices?
    • I am facing issues with KitProg used as mass storage programmer.
    • I am facing Issues with HSSP using external microcontroller.
    • How do I run a bootloadable (Application) project in debug mode?

  • PSoC Programmer Known Limitations.
    • “Erase Block” does not always save changes after hitting Enter.
    • Firmware upgrade of KitProg kits (CY8CKIT-040/042)
    • Abort button does not work for MiniProg3 in Power Cycle mode (SWD protocol)
    • MiniProg3 overrides Reset button on CY8CKIT-001
    • Python examples fail with new Python interpreters
    • CY3240 Bridge always keeps INT line in the low state
    • MiniProg1 firmware v1.77 causes an acquire failure.
    • PRoC UI devices cannot be programmed above 3.3V
    • Bridge Control Panel runs out of memory if monitoring data for a long time
    • PSoC Programmer does not work if installed on another disk
    • JTAG/SWD communication for PSoC 3/5 is not stable with the clock above 3.2 MHz.
    • Programming in the protected state in 3rd party IDEs
    • Simultaneously execution of commands in Bridge Control Panel
    • Upgrading the KitProg1/KitProg2 firmware in a virtual environment (for example, “Parallels Desktop” or “VMWare Fusion”)
    • Superset programming
    • Using bridging hardware
    • There is no programming support for wafer sale parts.
    • Specific locations are not indicated if programming verification fails.
    • The name of CMSIS-DAP port of FM0+ kits may change on different PC and USB ports.
    • ICE4000 is no longer supported in PSoC Programmer.
    • PSoC Programmer applies 3.3 V to the XRES pin during connection
    • The MiniProg1 programmer does not support the CY8C25/26xxx parts.
    • CY3210-MiniProg1: capacitors soldered to the SCL and SDA lines
    • The CY3240 USB-I2C Bridge firmware cannot be upgraded in the field using the Bootloader interface.
    • PSoC Programmer should not be used with FM0+ devices on Serial Programming Mode.

 

  • Different firmware upgrade methods

 

PSoC 3 and PSoC 5LP offer industry-standard programming/debugging methods - SWD and JTAG. PSoC 4 supports only SWD. Different programming techniques are useful at different product phases, such as product development, manufacturing, and field upgrade. See Cypress’s programming kits and documents for more information.

 

    • Programming Using MiniProg3 (CY8CKIT-002) or DVKProg/KitProg

During development, you need programming hardware that communicates with an IDE to repeatedly program and debug firmware. PSoC development IDE tools – PSoC Creator and PSoC Programmer – can communicate with MiniProg3 (CY8CKIT-002) and DVKProg/KitProg. Miniprog3 supports JTAG and SWD programming. See Figure 1.

Figure 1. MiniProg3

 

DVKProg is a USB-based onboard programming interface implemented using an FX2LP device. It supports SWD programming/debugging. This onboard programming interface is present on many of Cypress kits such as CY8CKIT-030 and CY8CKIT-050. See Figure 2.

Figure 2. DVKProg Programmer Present on CY8CKIT-050

 

Kitprog is a USB-based onboard programming interface; it is implemented using a PSoC 5LP device.  It supports SWD programming/debugging. It is present on many of Cypress kits such as CY8CKIT-042, CY8CKIT-044, and CY8CKIT-059. See Figure 3. Kitprog on some kits also provides mass storage configuration. When KitProg is in mass storage mode, it appears on your PC as a mass storage device. You can just drag and drop a hex file to program the PSoC. See the Kitprog User Guide for more details.

Figure 3. KitProg Programmer Present on CY8CKIT-044

    • HSSP using an external microcontroller

Host-sourced serial programming (HSSP) involves an external controller programming a PSoC device over SWD. MiniProg3 is also an HSSP host. In many applications, you may want to program the onboard PSoC device using another microcontroller (host), which is usually larger and acting as a main controller. It is achieved by implementing the SWD code on the host microcontroller on the board. The host updates firmware on the PSoC device over SWD. HSSP using an external microcontroller can be used to update the PSoC firmware in the field. See Figure 4. See the following application notes that describe HSSP code for different PSoC devices:

Untitled.pngFigure 4. Example Showing HSSP Using External Microcontroller over SWD

 

    • Production Programming

Production programming differs from development-cycle programming. The production programming setup is used in a manufacturing environment and can reliably program multiple units in a short time. Cypress recommends several qualified third-party vendors.

 

    • Bootloading

A bootloader is another way to update a product's firmware in the field. A bootloader uses a standard communication interface such as USB, I2C, UART, or SPI. The PSoC device must have two code modules in flash – a bootloader and the firmware application; see Figure 5. The bootloader communicates with a host over a communication interface, receives a new firmware image, and loads it into the “Application” part of the flash. In bootloading, only the “Application” portion of flash is updated, not the entire flash. In addition, bootloading requires the PSoC device to be first programmed with the bootloader code using one of the programming methods discussed above.

On the host side, the implementation requires sending a new firmware image to the PSoC device over a communication interface such as USB, I2C, UART, or SPI. The host does not need to implement JTAG or SWD protocols. Figure 5 and Figure 6 show bootloader examples

Note: The Cypress development kit CY8CKIT-049 4xxx has only a bootloader as a flash update option. The board has an on-board USB-Serial Bridge that enables bootloading from a PC over USB-UART.

 

  Untitled.png

Figure 5. Bootloading with a Host Controller

 

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Figure 6. Bootloading with Mac/PC as Host

 

  • Troubleshooting Programming Failures

 

    • Firmware and programmer settings

Programming/debugging may fail if the settings in the PSoC Programmer/PSoC Creator are not set according to your hardware. Some of the settings may apply only to MiniProg3 and are greyed out when DVKProg/KitProg is used for programming.

 

        • PSoC Programmer Settings

If you are using PSoC Programmer to program the device, check the settings as shown in Figure 7. See PSoC Programmer > Help Topics to understand the settings. These settings are described in the following:

Figure 7. PSoC Programmer Settings

 

          • Programming mode (Power Cycle or Reset): In power cycle mode, the device is reset by using power-on-reset – power to the PSoC device is toggled so that it goes through power-on-reset. For this, all power supply pins of the PSoC device must be shorted together and connected to MiniProg3’s VTARG pin so that it can toggle power to the PSoC device. It becomes more complex to implement this if the board has many components. Therefore, it is recommended to implement the reset method of programming unless the part does not have an external reset (XRES) pin.

In the reset mode, the MiniProg3’s reset pin is connected to the PSoC XRES pin. The PSoC device is reset by asserting a reset pulse on this pin.

 

          • Connector (5-pin or 10-pin): Choose the connector type as 5-pin or 10-pin according to your board. 10-pin supports both JTAG and SWD protocols. 5-pin supports only SWD programming.

          • Auto Detection: Use the AutoDetection feature by setting this to ON so that PSoC Programmer detects the PSoC device automatically.

          • Protocol: Select the appropriate protocol between SWD and JTAG.

 

SWD

JTAG

PSoC 3 and PSoC 5LP

PSoC4

 

          • Voltage: Choose an appropriate voltage according to the power supply on the board. MiniProg3 measures the voltage on its VTARG pin; it is displayed in PSoC Programmer under “Status”, as highlighted in blue in Figure 7. Make sure that these voltages are correct.
            If your board is self-powered and the MiniProg3 VTARG pin is not connected to the supply voltage on the board, PSoC Programmer reports zero volts. To avoid this, toggle the MiniProg3 power using PSoC Programmer software as highlighted in green in Figure 7.

          • If the board is powered through MiniProg3’s VTARG pin, keep in mind that MiniProg3 can supply up to 200 mA of current.

        • PSoC Creator – Program/Debug Setting

If you are using PSoC Creator, go to PSoC Creator > Tools > Program/Debug > Port Configuration > MiniProg3. Most of the settings are the same as the PSoC Programmer settings as explained above.

            • Check the settings as shown in Figure 8.
            • Choose an appropriate voltage according to the power supply on the board. Unlike PSoC Programmer, PSoC Creator does not display measured voltage from the MiniProg3 VTARG pin. If your board is self-powered (MiniProg3 is not powering the board), choose the “external” option for the power as highlighted in blue in Figure 8.

Figure 8. PSoC Creator Port Configuration

 

        • PSoC Creator Setting for JTAG Protocol

If you are using the JTAG protocol for programming/debugging, the debug port on pins must be enabled. Set the pins to “4-wire JTAG” or “5-wire JTAG”. The default factory setting is “4-wire JTAG”. However, if you have changed this setting by programming your firmware, set this option back to “4-wire JTAG” or “5-wire JTAG” and program the chip over SWD. After this, you will be able to use JTAG.

 

This option is present in PSoC Creator > <project name>.cydwr > System tab > Debug Select. See Figure 9

Figure 9. Debug Selection Option

 

 

        • PSoC Programmer / PSoC Creator not detecting MiniProg3
          • See if MiniProg3 appears in Windows Device Manager. If not, it indicates a potential problem with either the board or the connection.
              1. Try another MiniProg3 programmer.
              2. Check the cable length and try using another cable.
              3. If you are using a USB hub to connect MiniProg3, test without using the hub.

 

        • Software Version

 

        • PSoC Programmer Version
          • Check that you have the latest PSoC Programmer version available from the Cypress website. Older versions of PSoC Programmer may not have the latest device database. Therefore, PSoC Programmer might report an error while programming new revisions of silicon.

 

          • Example: “The hex file was built for silicon revision xxx, but the acquired device is revision *x. Use PSoC Creator to generate a hex file for the proper device”.

 

        • KitProg Version
          • If you are using PSoC Programmer to program the device, it automatically prompts you to update the KitProg firmware if required. For this, the PSoC Programmer software should be latest version available on the Cypress website. Also, the “Auto-Update of Firmware” option present in PSoC Programmer should be enabled. This option is present in PSoC Programmer > Options > Programmer Options as shown in Figure 10.

 

If you are using PSoC Creator to program the device, PSoC Creator reports an error saying “KitProg version expecting x.xx but found x.xx. Please use PSoC Programmer GUI to upgrade firmware.”

 

Refer to PSoC Programmer > Help Topics > Update Firmware section to see how to update the KitProg firmware.

 

  Figure 10. PSoC Programmer Options for Auto Update

 

        • Potential hardware bugs that might cause programming failures
          • PSoC Programmer/PSoC Creator might fail with different errors when the hardware is incorrect. Check the following points on hardware. See AN61290 (PSoC 3 and PSoC 5 LP) and AN88619 (PSoC 4) for hardware considerations.
            1. VCCD/VCCA Connection

VCCD and VCCA are the output voltages of internal digital and analog regulators respectively. In the regulated mode of powering PSoC, this pin should not be shorted to any other pin or IC on board (except for shorting of two VCCD pins in PSoC 3 and PSoC 5LP devices). See Figure 11. There should be recommended capacitors present on these pins as shown in device datasheets.

 

Note 1: There is an unregulated mode of powering PSoC. In this mode, the supply voltage should be between 1.71 V and 1.89 V. Here, VCCD/VCCA should be shorted to the supply voltage. The internal regulators are automatically disabled. Refer to the device datasheet for more details.

 

Note 2: PSoC 3 and PSoC 5LP devices have two VCCD pins. Both VCCD must be connected together with a capacitor connected to it. The trace between the two VCCD pins should be as short as possible.

Untitled.png 

Figure 11. VCCD Connection in Regulated Mode of Powering PSoC

 

2. XRES Connection

XRES in PSoC devices has an internal pull-up resistor. Do not connect an external pull-up resistor. An external pull-up resistor will fall in parallel to the internal pull-up resistor, reduce its value, and may lead to programming failures.

 

You can connect a small cap of 0.1 µF on the XRES line to filter any glitches on XRES. This is not compulsory. If placed, it should be of small value such as 0.1 µF. See Figure 12.

 

Note: Some devices do not have an XRES connection and some provide an optional XRES pin. When the optional XRES pin is used for reset purpose, the same care should be taken as explained above with respect to pull-up resistor and capacitor on it.  The devices that do not have an XRES pin at all should use the power-cycle method of programming.

 

Untitled.png

Figure 12. XRES Connection

 

3. Power supply capacitors

The supply pins VDDD, VDDA, VDDIOx pins must have decoupling capacitors on them. Please see the Power section of the datasheet of respective devices to see recommended values of capacitors. Note that these capacitors should be placed close to supply pins. See Figure 13.

 

Figure 13. PSoC 4 Single Power Supply Rail for Analog and Digital: Regulated Mode

 

4. Voltages on different power pins

Confirm the following points on the board with respect to power pins of PSoC. If any violations are found, review the power section of the board. 

                1. VDDA should be highest voltage on the chip.
                2. VDDA and VDDD should be powered. If VDDIO1 is present on chip, it should be powered too, as it powers the programming pins.
                3. When the supply pins VDDA and VDDD are powered, the pins - VCCD and VCCA should show voltage close to 1.8 V when measured.

 

        • Programming Lines Connection
          • Make sure that the programming connector orientation is not flipped. Figure 14

Figure 14. MiniProg3 Connector Pins

 

          • Check if connection exists between the PSoC programming pins and the programming header. You can test it by checking the short between the PSoC pins and the programming header.

 

        • Device-Specific Issues

 

        • PSoC 4000 family P1_6 pin
          • Do not connect any pull-down resistor on pin P1_6. This pin acts as a reset pin during power up. This pin is pulled up internally. Placing a pull-down resistor externally causes the reset to be asserted, and the device fails to come out of reset.

 

        • PSoC 4000 16-QFN and SOIC package devices, Power Cycle Method
          • These devices do not have a reset pin. The only method to assert a hardware reset is power-on-reset. Therefore, programming can be performed only by the power-cycle method. Note that for the power-cycle method, you must short all of the supply lines. Figure 15 shows selecting the power-cycle method in PSoC Programmer.

Figure 15. Power Cycle Method

 

  • FAQ's

 

  1. Where do I find the hex file in a PSoC Creator project?

  Ans: The hex file location depends on the compiler used to compile the project and the mode (debug or release) used to build the project.

For example:

For a PSoC 3 device with Keil v951 compiler, the hex file location is:

Project Directory\<project_name>.cydsn\ DP8051_Keil_951\Release or Debug\<project_name>.hex

For PSoC 4 and PSoC5LP devices with ARM GCC v493 compiler, the hex file location is:

Project Directory\<project_name>.cydsn\ ARM_GCC_493\Release or Debug\<project_name>.hex

 

    2. Where do I find the checksum in the hex file?

Ans: Use the tool “HexFile Parser” provided with HSSP application notes. When you parse your hex file using this tool, it generates a HexImage.c file. This file has  the checksum as an array as follows:

              Example: unsigned char const ChecksumData_HexFile[2] = {0xAA, 0x2A};

 

    3. Can I use USB pins in PSoC 3 and PSoC 5LP devices to program?

        Ans: Yes, the USB pins in PSoC 3 and PSoC  5LP (P15[6] and P15[7]) can be used for SWD programming.

 

    4. Can I use P3[0] and P3[1] of PSoC 4000 family of devices for I2C connection?

Ans:  Yes, you can use these for I2C connection. Change the debug setting on these pins to GPIO.  Select the PSoC Creator project and the select double-clock on Workspace, and then double-click on .cydwr  file. On the Systems tab, select Programming\Debugging > Debug Select > Change to GPIO. Refer to Figure 16.

 

Figure 16. Debug Select Option to GPIO

5. My device is programmed in PSoC Creator; however it fails to program with PSoC Programmer.

Ans: This may happen when the device part number is not chosen correctly in PSoC Programmer. Note that PSoC Creator may not specifically check for device part numbers within a device family. However, PSoC Programmer checks if the part number for which hex file is created and the part number selected are the same. Try choosing the “Auto Detection” feature in PSoC Programmer so that it automatically selects the part number.

 

      6. Why can I not find the device in the device family in PSoC Programmer?

Ans: Set the “Auto Detection” feature in PSoC Programmer to ON. If this is not done, then make sure the “Protocol” option is set correctly. PSoC Programmer filters out devices based on this setting. Also, make sure you have the latest version of the PSoC Programmer software from www.cypress.com.

 

7. Can I debug with “Debug Select” option set to “GPIO” in PSoC Creator?

Ans: Yes, you can debug with the “Debug Select” option set to GPIO. However, depending on where the debug pins are connected on your board, there may be interference from external signals, and so debugging data may be corrupted. Also, with the “Debug Select” option set to GPIO, you cannot use the “Attach to Running Target” feature.

 

8. How do I use MiniProg3 when the board is self-powered (not powered from MiniProg3)?

Ans: Connect Miniprog3 to the board first and then to the PC. PSoC programmer detects if the board is already powered or not. If it is already powered, then MiniProg3’s power will not be turned on. Connecting MiniProg3 to PC first and then to board may cause damage to the MiniProg3.

 

9. MiniProg3 is detected in PSoC Programmer/PSoC Creator, but not getting connected.

Ans: Usually this happens when another program is already using the MiniProg3. Close the other program on your PC or disconnect MiniProg3 from the other program to overcome this issue.

 

10. Will the debugging session be lost if I reset the device while debugging?

Ans: You cannot use hardware reset while debugging the project. However, PSoC Creator allows software reset while debugging.

 

11. What should be the configuration of programming/debugging pins to have smaller sleep current?

Ans: Change the configuration of programming pins to GPIO mode. This can be done in .cydwr fileàSystem tabà Debug Select. See Figure 17.

 

Figure 17. Debug Select Option for Pins

 

12. If I disconnect MiniProg3 from the PC but leave it connected to the board, firmware does not run.

Ans:  Yes, if MiniProg3 is disconnected from the host PC and is connected to the board, XRES is held low and therefore, PSoC is held at reset.

 

13. If I connect MiniProg3, will there be higher current consumption on the board?

Ans: Yes, please disconnect MiniProg3 while doing power measurements.

 

14.  Can I connect multiple devices on an SWD port?

Ans: SWD protocol does not support programming multiple devices. For PSoC 3 and PSoC 5LP devices, use JTAG chaining. For PSoC 4, you can have an external multiplexer on the programming lines if multiples devices are to be programmed using same connector.

 

15.  How do I convert hex file to SVF format?

Ans: You can convert hex to SVF for PSoC 5LP using the HEX to SVF Converter installed with PSoC programmer. Go to <Install Directory>\Cypress\Programmer\HexToSvf. You can find the .exe file. In order to know how to use this tool, see section ‘5.1 Cypress SVF Tools ‘ of the document ‘Third-Party Tools for Cypress Devices User Guide’. This document is available in the same folder.

 

16. How to program chip scale package (CSP) devices?

Ans: Refer to application note AN89611.

 

17.  How do I perform production programming for PSoC devices?

Ans: Cypress engineering programmers are not recommended for mass production programming environments due to their mechanical design, plastic enclosures, and plastic headers. The Miniprog3 provides overcurrent protection and overvoltage protection, but due to the manufacturing environments customers may subject the engineering programmers to damaging conditions. It is recommended that customers use mass-production programmers for manufacturing. The following link provides you a complete list of recommended vendors: http://www.cypress.com/?rID=2543.

 

18. I am facing issues with KitProg used as mass storage programmer.

Ans: See the “Troubleshooting the KitProg” section in the KitProg user guide (http://www.cypress.com/file/157966/download).

 

19. I am facing Issues with HSSP using external microcontroller.

Ans: See the “Tips and Tricks for Debugging HSSP Issues” section in HSSP application notes. See the following:

 

20. How do I run a bootloadable (Application) project in debug mode?

Ans: In the PSoC Creator bootloader system, the bootloader project executes first and then the bootloadable project. The jump from the bootloader to the bootloadable project is done through a software-controlled device reset. This resets the debugger interface, which means that the bootloadable project cannot be run in debugger mode.

To debug a bootloadable project, remove or disable the Bootloadable Component from it and debug it. Then re-install or re-enable the Bootloadable Component after debugging is done. Another option is to program the Bootloadable project .hex file onto the device and then use the “Attach to running target” option for debugging while the bootloadable project is running. See Figure 18. In this case, you can debug the bootloadable project only from the point where the debugger is attached to the device.

 

Figure 18. Debugging Bootloadable Project

 

  • PSoC Programmer Known Limitations

 

1.  “Erase Block” does not always save changes after hitting Enter.

When using “Erase Block” function in PSoC Programmer GUI, Block ID and Bank ID fields may not be saved between dialog sessions. This is a known problem of the MaskTextBox component of WinForms .NET library. To save these values between dialog sessions, do the following:

1. Delete the existing value in the Block ID/Bank ID field.

2. Enter the new value.

3. Press Enter or press the Erase Block button.

 

2. Firmware upgrade of KitProg kits (CY8CKIT-040/042)

When starting KitProg's firmware upgrade in the PSoC Programmer GUI, ensure that the Bootloader Host (PSoC Creator’s) tool is not running. Otherwise, upgrade may fail due to attempts of the host tool to access KitProg's bootloader.

 

3. Abort button does not work for MiniProg3 in Power Cycle mode (SWD protocol)

Abort does not work for MiniProg3 in Power Cycle mode for SWD protocol. As a workaround, remove the MiniProg3 from the USB-port during this lengthy operation.

 

4. MiniProg3 overrides Reset button on CY8CKIT-001

MiniProg3 keeps the XRES pin in active HIGH or LOW state after ISSP operation is complete, thereby blocking the the Reset button if active XRES state of target is HIGH (and MiniProg3 is connected to ISSP header).

 

5. Python examples fail with new Python interpreters

Due to changes in Python from version 2.6 to 3.0, Python code examples fail. One example is the print statement being replaced by the print() function. A syntax error is thrown when attempting to run the examples with Python 3.0+. Cypress is currently requesting users to use Python 2.6 when using the Cypress code examples.

 

6. CY3240 Bridge always keeps INT line in the low state

This causes a problem if the bridge’s INT line is connected to the target’s XRES line with active LOW polarity. Due to HW limitation, the INT line cannot be moved to HI-Z state from firmware. Design your boards for compatibility with the CY3240 bridge.

 

7. MiniProg1 firmware v1.77 causes an acquire failure.

In previous releases of the MiniProg1 firmware, the reset line was pulled LOW during the power cycle programming. MiniProg1 now supports devices that have active LOW reset line states. To account for this, MiniProg1 now leaves the reset line in a HI-Z state. Be aware of any pull-up or pull-down resistor circuitry that could hold the chip in a reset state.

 

8. PRoC UI devices cannot be programmed above 3.3V

MiniProg3 and MiniProg1 programmers can supply power to the target device in excess of 3.3 V. The PRoC UI devices can only be programmed in the 1.7–3.3 V range. Programming above 3.3 V may cause damage to the PRoC-UI device or the radio chip.

PSoC Programmer prompts you if you select the PRoC-UI devices in a hazardous configuration.

 

9. Bridge Control Panel runs out of memory if monitoring data for a long time

In such situations, you need to restart the GUI. It is recommended that you fix the Chart’s samples, so it will scroll. Set the scroll window size in “Scroll” parameter of “Char > Variable Settings” menu (for example, 1000-10000)

 

10. PSoC Programmer does not work if installed on another disk

If installing PSoC Programmer in a location other than the default value, ensure that your location does not use ‘-‘ characters in folder names or paths.

 

11. JTAG/SWD communication for PSoC 3/5 is not stable with the clock above 3.2 MHz.

The maximum programming speed available is dependent upon the CFGSPEED NVL setting from the previous programming session. This setting has two options: 12 MHz and 48 MHz. This configures how fast the IMO runs, which in turn configures how fast the BUS clock can run. For reliable results, programming/debugging should not be done faster than 1/3 of the BUS clock. The higher the clock speed used, the more likely a failure will occur. The length of the cable as well as capacitance on the board can affect the ability to successfully send data over JTAG or SWD. For PSoC 3/5LP flash read/write operations, the recommended upper frequency bound is 3.0–3.2 MHz.

 

12.  Programming in the protected state in 3rd party IDEs

3rd party Integrated Development Environments (for example, µVision IDE,  Keil and IAR Embedded Workbench, IAR Systems) do not support programming if silicon or flash rows are in the protected state. If your device is flashed with PSoC Creator’s project, where the “Chip Protection” option is not set to “Open” and/or the “Flash Security” settings page contains at least one protected row, perform an “Erase All Flash” operation in PSoC Programmer before programming the device using a 3rd-party IDE.

 

13.  Simultaneously execution of commands in Bridge Control Panel

In Bridge Control Panel, executing several commands simultaneously does not guarantee that these commands will be executed sequentially without any delay. Each command is a separate USB transaction. The delay depends on the PC characteristics and the connected bridge type (more significant for USB HID devices such as KitProg and KitProg2).

 

14. Upgrading the KitProg1/KitProg2 firmware in a virtual environment (for example, “Parallels Desktop” or “VMWare Fusion”)

Upgrading the KitProg1/KitProg2 firmware in a virtual environment may result in failure during initialization, or detection of the kit as a “Bootloader device” instead of “KitProg” after firmware update. This is because during a firmware update process, KitProg changes the mode from “KitProg” to “Bootloader” and then back to “KitProg”. This changing of the VID/PID of the USB device causes the virtual machine to unplug the kit from the guest OS.

To prevent this issue, use one of the following solutions:

a.  Configure the virtual machine to automatically connect all USB devices to the guest OS.

b.  If automatic connection of all USB devices is not supported, the virtual machine may be configured to connect automatically only the devices with known VID/PID. For KitProg, switch the kit into the three different modes successively (“Bootloader”, “KitProg” and “Mass Storage”) and configure the virtual machine to connect the detected devices (in each mode) to the guest OS automatically.

c. If the virtual machine does not support such configuration, manually reconnect the kit after switching from KitProg to Bootloader mode or vice versa.

 

15. Superset programming

While PSoC Creator supports the superset programming concept, PSoC Programmer does not. PSoC Programmer is intended to be a production programming tool rather than a prototyping tool. After the firmware project is complete, produce the hex file for the corresponding part number and program it in production with PSoC Programmer or third-party tools.

 

16. Using bridging hardware

The supported programming and bridging hardware can only be used by one application at a time. Closing the port in one application releases the hardware for other client applications.

 

17. There is no programming support for wafer sale parts.

 

18.  Specific locations are not indicated if programming verification fails.

 

19.  The name of CMSIS-DAP port of FM0+ kits may change on different PC and USB ports.

This issue occurs with FM0+ kits with an empty Serial Number string (USB Device Descriptor), or if it is not unique. In this case, the OS generates a unique string based on physical USB port address, and this string is used in PSoC Programmer for creation of unique name for CMSIS-DAP port. Keep this in mind when developing your own applications that use port acquisition APIs, exposed in PSoC Programmer.

 

20.  ICE4000 is no longer supported in PSoC Programmer.

 

21.  PSoC Programmer applies 3.3 V to the XRES pin during connection

When using ICE-Cube or MiniProg1 for programming, PSoC Programmer applies 3.3 V to the XRES pin during connection. This may cause power to be applied to the target system. During programming, 3.3 V is applied to the target system's SCLK (P1-1), SDATA (P1-0), and XRES pins.

 

22. The MiniProg1 programmer does not support the CY8C25/26xxx parts.

The ICE-LPT and ICE-4000 programmers support the CY8C25/26xxx parts. If required, use PSoC Programmer version 2.33 or earlier.

 

23. CY3210-MiniProg1: capacitors soldered to the SCL and SDA lines

CY3210-MiniProg1 may have two capacitors soldered to the SCL and SDA programming lines, causing failures during programming. To remove these capacitors, contact Cypress technical support for additional steps in addressing this issue.

 

24. The CY3240 USB-I2C Bridge firmware cannot be upgraded in the field using the Bootloader interface.

If an upgrade is required, you need to reprogram its firmware completely from usbtoiic.hex located in the PSoC Programmer installation folder. For reprogramming, use any PSoC 1 programmer (such as MiniProg1 or MiniProg3) connected to a 5-pin ISSP header on the Bridge’s board. Select “Power Cycle” for programming the Bridge. Cypress recommends that you upgrade to the superset MiniProg3 kit, which should replace the CY3240 Bridge in field.

 

25. PSoC Programmer should not be used with FM0+ devices on Serial Programming Mode.

Serial Programming Mode is assumed to be used with serial interface such as UART or USB. It is not assumed to be used with SWD interface used by PSoC Programmer.