FR To do high-speed data access

Version 3


    FR series uses separated Hardware Architecture between Data Bus and Instruction Bus. And each resource is connected via Bus converter.


    Internal Architecture



    Bus of only Instruction is called as I-Bus, and Bus of only Data is called as D-Bus.
    RAM with connecting to each Bus is called as I-RAM and D-RAM.


    Instruction (CODE area) is possible to locate in I-RAM. And Data (DATA/STACK area and etc.) is possible to locate in D-RAM. Instruction is impossible to locate in D-RAM, because D-RAM is connected to Data Bus.
    The area with connecting to each Bus is possible to access with 1 cycle. And we strongly recommend to use in case of more high-speed process is needed.


    F-Bus is used Princeton Bus, which Data is able to share. It is connected I-Bus and D-Bus via Bus converter. RAM with connecting to F-Bus is called as F-RAM. And each resource is connected via R-Bus by Bus width conversion adapter.
    F-RAM is possible to locate both Instruction and Data area. However it is taken more cycle than I-Bus and D-Bus because of via Bus converter.


    At development of software, please set Liker location as consideration of above mentions. For example, more performance is expected by locating Data area, which more access is occurred frequently, to D-RAM even same RAM.