Why does the “write configuration to flash” command fail for CY8C201x0 devices?
In some devices, flash write fails at operating voltages below 3.0 V. The primary reason is that the CPU clock frequency decreases at lower operating voltages. As a result, the “flash write” routine takes longer and a watchdog reset occurs before the routine is completed. This issue typically occurs on devices that have relatively fast ILO (even though the ILO is within the datasheet specifications).
Workaround: Because watchdog reset triggers when the sleep timer expires three times, reduce the sleep timer frequency (which is configurable over I2C) to 8 Hz or below (if Vdd < 3.0V) before you store the configuration to flash.