How can I interface a 3.3-V device (LCD) for with a 5-V powered PSoC 3/PSoC 5LP device?
In PSoC 3/PSoC 5LP devices, I/Os are divided into four quadrants. The pins VDDIO0, VDDIO1, VDDIO2 and VDDIO3 are used to control the I/O voltage of each quadrant respectively. Therefore, each quadrant can be configured to have a different threshold level. Thus, even if the device is operating at 5 V, an I/O port can be configured for a threshold voltage of 3.3 V and thereby can be interfaced with an external device operating at 3.3 V.
The VDDIO pins should be supplied with a reference voltage in order to control the I/O threshold voltage. In PSoC 3/PSoC 5LP devices, this reference voltage can be generated inside the chip itself. A voltage DAC (VDAC) is used to generate the required reference voltages. The VDAC output is passed through an opamp buffer to increase the drive strength (25 mA source/sink for the entire quadrant).The advantage of this method is that the voltage DAC provides eight bits of programmability to the reference voltage.
Therefore, the threshold voltage of I/Os can be varied during runtime. The figure below shows the required connections.
The opamp output is routed to P3, which belongs to Quadrant 3. Quadrant 3 will be powered by the supply voltage, VDDIO3. The blue line shown implies an external wire connection.
See Figure 1 and Figure 2 for the configuration of the DAC and opamp to generate 3.3 V.
Figure 1 : VDAC Configuration
Figure 2 : OpAmp Configuration