What are the differences between the pins exposed on J1 and J2 headers of the EZ-BLE PRoC Evaluation Boards (CYBLE- 212006-EVAL, CYBLE-202007-EVAL and CYBLE-202013-EVAL) and the pins expected by the J10 and J11 headers on the BLE Pioneer Kit (CY8CKIT-042-BLE) ?
Yes, there are differences between the pins exposed. The EZ-BLE PRoC Evaluation Board quick start guides explains how to use the board with the BLE Pioneer Kit and the differences in pin mapping. This is also explained below.
Figure 1 shows the J10 and J11 headers on the BLE Pioneer Kit.
Figure 1: J10 and J11 headers on BLE Pioneer Kit
The EZ-BLE PRoC Evaluation Boards can be plugged on to these headers as shown in Figure 2 (only CYBLE-202007-EVAL is shown in the picture).
Figure 2: EZ-BLE PRoC Evaluation Board (CYBLE-202007-EVAL) plugged on BLE Pioneer Kitt
Figure 3 shows the pinout and details of the EZ-BLE PRoC Evaluation Board (CYBLE-202007-EVAL), which is a fan-out board for EZBLE PRoC Modules (CYBLE-202007-01). The base PCB is the same for the three Evaluation Boards, CYBLE-212006-EVAL, CYBLE- 202007-EVAL and CYBLE-202013-EVAL.
Figure 3: EZ-BLE PRoC Evaluation Board (CYBLE-202007-EVAL) Pinout
The EZ-BLE PRoC Module exposes a subset of the GPIOs that are expected on the BLE Pioneer Kit. Therefore, the evaluation board for the module has several pins that do not map to any port of the module. In addition, some pins exposed on the J1 and J2 headers of the evaluation board differ from the pins expected on the J10 and J11 headers of the BLE Pioneer Kit. A table showing the complete pin mapping and highlighting differences between CY8CKIT-042-BLE and CYBLE-202007-EVAL is shown below. The table is also valid for CYBLE-212006-EVAL and CYBLE-202013-EVAL. The table specifies NC (No Connect) for the pins that are not available on the evaluation board.
|CY8CKIT-042-BLE J11 Header||CYBLE-202007-EVAL J2 Header||CY8CKIT-042-BLE J10 Header||CYBLE-202007-EVAL J1 Header|
*EZ-BLE PRoC Module shorts the digital and analog power rails of PRoC BLE (highlighted rows in blue)
**Pins differ from the pins expected on the BLE (highlighted rows in yellow)
***This pin is connected to the Cmod capacitor on the EZ-BLE PRoC Evaluation Boards.
Note: The EZ-BLE PRoC Module is supported on PSoC® CreatorTM 3.3 DP1 and later versions. While the GPIOs available on the EZ-BLE PRoC Module and consequently on the EZ-BLE PRoC Evaluation Board are limited, every functionality available on a PRoC BLE silicon is available on the EZ-BLE PRoC Module. The only exception is the CapSense® Gestures Component that handles one- and two-finger gestures. This Component is not available on the EZ-BLE PRoC Modules.
EZ-BLE PRoC Evaluation Board
PRoC BLE Modules
PSoC 4 BLE Modules
Headers (on CYBLE-212006-EVAL/CYBLE-202007-EVAL/CYBLE-202013-EVAL): Usage description
It is used to short VDDD and VDDR.
Note: J3 can be ignored for usage if customers insert the Evaluation Board into CY8CKIT-042-BLE since VDDD and VDDR are short in CY8CKIT-042-BLE. However, if customers use the Evaluation Board separately, customers need to short J3 based on application requirement.