The Dstc_ClearDreqenbBit() function in Peripheral Driver Library (PDL) 2.1.0 sets the DREQENB register bit instead of clearing it. The problem is reproducible on the FM0+ and FM4 family of devices when using the DSTC driver from PDL 2.1.0. Is there a workaround?
There is a workaround, which requires manual PDL source modification. Open the file /drivers/dstc/dstc.c and find the Dstc_ClearDreqenbBit() function. Replace the following line:
*(uint32_t*)(uint32_t)(((uint32_t)(&FM_DSTC->DREQENB0)) + ((4ul * (uint32_t)u8WordPos))) |= u32BitPosRelative;
with the line:
*(uint32_t*)(uint32_t)(((uint32_t)(&FM_DSTC->DREQENB0)) + ((4ul * (uint32_t)u8WordPos))) &= ~(u32BitPosRelative);
This problem will be corrected in the next PDL 2.x release. Contact Cypress technical support (www.cypress.com/mycases) for possible firmware updates and help with using the DREQENB register.