Value of the internal pull-up resistor on RESET#, HOLD#, WP#, and BYTE# for Infineon flash memory products – KBA218745
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Version: *A
Translation - Japanese: S25FL-SとS25FL-LシリーズのRESET#, HOLD#, WP#の内部プルアップ抵抗値 - KBA218745 - Community Translated (JA)
This article provides the value of the internal pull-up resistor on RESET#, HOLD#, and WP# input signal pins for Infineon, Parallel, QSPI, SEMPER™ QSPI, Octal (xSPI), HYPERFLASH™/HYPERBUS™ memory products.
Internal to the flash, there is an impedance circuit that simulates a pull-up resistor. This impedance circuitry involves a circuit of transistors on the RESET#, HOLD#, WP#, and BYTE# input signal pins. The interface protocol and unknown customer use case conditions have some influence on the value of the impedance circuitry. Therefore, cannot quote the precise value of the impedance circuitry. However, see Table 1 for the approximate value of the impedance circuitry.
Table 1 Approximate value of the impedance circuitry
QSPI |
SEMPER™ QSPI |
SEMPER™ HYPERBUS™ |
SEMPER™ Octal |
Parallel |
|||||||
S25FS-S 2.0 V |
S25FL-S 3.6 V |
S25FL-L 3.6 V |
S25HS-T 2.0 V |
S25HL-T 3.6 V |
S26HS-T 2.0 V |
S26HL-T 3.6 V |
S28HS-T 2.0 V |
S28HL-T 3.6 V |
S29GL-S 3.6 V |
S29GL-T 3.6 V |
|
RESET# |
na |
5.0 MΩ |
4.4 MΩ |
5.0 MΩ |
5.0 MΩ |
5.0 MΩ |
5.0 MΩ |
5.0 MΩ |
5.0 MΩ |
na |
na |
RESET# / IO3 |
5.0 MΩ |
na |
4.4 MΩ |
5.0 MΩ |
5.0 MΩ |
na |
na |
na |
na |
na |
na |
HOLD# / IO3 |
na |
5.0 MΩ |
na |
na |
na |
na |
na |
na |
na |
na |
na |
WP# |
na |
na |
na |
na |
na |
na |
na |
na |
na |
3.6 MΩ |
3.6 MΩ |
WP# / IO2 |
5.0 MΩ |
5.0 MΩ |
4.4 MΩ |
5.0 MΩ |
5.0 MΩ |
na |
na |
na |
na |
na |
na |
BYTE# |
na |
na |
na |
na |
na |
na |
na |
na |
na |
na |
3.6 MΩ |
- Tags:
- datasheet
- fl-l
- fl-p
- fl-s
- fs-s
- gl-p
- gl-s
- gl-t
- hl-t
- hold
- hs-t
- hyperbus
- hyperflash
- interface
- kl-s
- ks-s
- nor flash
- pin configuration
- Power -Up
- power cycle
- serial nor flash memory
- spi