Failure to Change to Sub Clock Mode – KBA219868

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Question:

Question: Before entering sub clock standby mode, failed to change from main clock divided by 2 (CSELR.CKS [1:0] = 00) to sub clock (CSELR.CKS [1:0] = 11). How to solve it? 

 

Answer:

Switching from division of the main clock by 2 (CSELR.CKS [1:0] = 00, Initial value) to sub clock (CSELR.CKS [1:0] = 11) is prohibited. Clock Source Selection Register CSELR.CKS [1:0] is used to select the source clock in different clock modes as shown in Table 1. The change flow displayed in Figure 1 should be followed to switch clock mode: CKS[1:0] = 00 → CKS[1:0] = 01→ CKS[1:0] = 11. 

Refer to Chapter 5: Clock of MB91520 Series Hardware Manual for more details.

Table 1. Description of register CSELR.CKS

Table

Figure 1. Clock switch flow

Figure 1