Default state of GPIF CTL lines

Question: What is the default state of the GPIF CTL lines?



Note that the default value of the GPIFIDLECTL register is 0xFF and that of GPIFCTLCFG is 0x00. As GPIFCTLCFG.7 is ‘0’, all the CTL lines would be available. Further, as GPIFCTLCFG [5:0] is all ‘0’s, for all the pins, the drive mode would be CMOS and GPIFIDLECTL [5:0] is all 1’s, so the default CTL pin state would be CMOS high [3.3 V].