PSoC® 4100L / 4200L USB Interrupts - KBA210282

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Question:

What are the interrupt sources for the USB block in PSoC 4100L / 4200L family of devices?

 

Answer:

The USB block has 13 interrupt sources that are mapped to the three hardware interrupts (interrupt vectors) as shown in Figure 1.

 

Figure 1. Mapping of USB Interrupt Events to Interrupt Vectors

 

1.png

 

The three hardware interrupts are named Interrupt Low, Interrupt Medium, and Interrupt High. The low and high interrupts are hardwired to the Nested Vectored Interrupt Controller (NVIC) in the ARM® Cortex® M0 CPU, and assigned interrupt vector numbers 30 and 31 respectively. The medium interrupt can be routed to any NVIC input and can have any vector number from 0-29.

 

Note that low, medium and high interrupts are just the names assigned for the USB interrupts, and have no relation to the priority assigned to these interrupts.

 

The USB Component automatically maps the interrupt sources to one of these three interrupts by default. You can also change the assignment using the radio buttons in the “Interrupts” tab of the Component GUI as shown in Figure 1. The interrupt priority of the three interrupt vectors can be changed in the <project>.cydwr file.

 

The 13 interrupt sources are listed below. See the PSoC Creator USB Component datasheet for more information on the interrupt sources and guidelines for working with the USB interrupts.

 

  • Control Endpoint Interrupt (EP0) – This interrupt source triggers when the host tries to communicate over the control endpoint. It is mandatory for USBFS Component operation.
  • Data Endpoint Interrupt (EP1 to EP8) - These interrupt sources trigger when the host tries to communicate over the corresponding data endpoint. It is available only when the endpoint is used by the device.
  • Arbiter Interrupt – This interrupt source triggers for multiple conditions such as IN endpoint buffer full, Endpoint DMA grant, Endpoint buffer overflow/underflow, Endpoint error in transaction, and Endpoint DMA termination. See the USBFS Component datasheet for information on the conditions that apply for different USB Component use cases.
  • Start of Frame Interrupt – This interrupt source triggers when a start-of-frame is received. To enable this interrupt source, the Enable SOF interrupt option must be enabled.
  • Bus Reset Interrupt – This interrupt source triggers when a USB bus reset event occurs. It is mandatory for USBFS Component operation.
  • Link Power Management (LPM) Interrupt – This interrupt source triggers when an LPM extension packet is received.

 

In addition to these three interrupt vectors—low, medium, high—the USB Component uses two more interrupt vectors internally as part of the implementation:

 

  1. The Port Interrupt Control Unit (PICU) interrupt vector for the Dp pin is used to detect a resume event when the USB device is in Suspend or LPM state, and a falling edge is detected on the Dp pin.
  2. When the USB Component is configured for “DMA with Automatic Buffer Management”, the common DMA interrupt handler is used to configure DMA descriptors for different endpoints, and trigger the DMA transfers.

 

See the USB Component datasheet for more details on these interrupts.