There is NO difference in write operations between QDR" and QDR"-II. The only difference exists in terms of read operations in the way data is put out of the SRAM. There is no change in the way address and control signals are placed. The exception is that there is an additional half a clock cycle of latency on QDR"-II on the first piece of data when performing a read. This means that during a read, instead of data being pumped out on the rising edge of C (or K in single clock mode) like on a standard QDR", the data is put out on the rising edge of /C on QDR"-II.