In present WICED the SPI bit banging clock frequency is set to 1MHz and cannot be changed directly by changing SPI_CLOCK_SPEED_HZ when initializing SPI using wiced_spi_init():

 

wiced_spi_device_t spi_device =

{

.port = WICED_SPI_1,

.chip_select = WICED_GPIO_16,

.speed = SPI_CLOCK_SPEED_HZ,

.mode = SPI_CLOCK_RISING_EDGE | SPI_CLOCK_IDLE_LOW | SPI_USE_DMA | SPI_MSB_FIRST | SPI_CS_ACTIVE_LOW,

.bits = 8,

};

wiced_result_t status = wiced_spi_init( &spi_device );

 

The delay is not set because the macro call SPI_BB_DELAY( cycles ) is not implementing any required delay. For this to enable, one need to define the following macro in platform_spi_i2c.c file (\WICED-Studio-5.0\43xxx_Wi-Fi\WICED\platform\MCU\BCM4390x\peripherals\platform_spi_i2c.c)

#define SPI_BB_TRANSFER_DELAY_SUPPORT

 

This macro will enable the following

#define SPI_BB_DELAY( cycles )                                                          \

    do                                                                                  \

    {                                                                                 \

        uint32_t delay_cycles = cycles;                                                 \

        uint32_t last_stamp  = PLATFORM_APPSCR4->cycle_cnt;                             \

                                                                                        \

        while (delay_cycles != 0)                                                       \

        {                                                                               \

            uint32_t current_stamp = PLATFORM_APPSCR4->cycle_cnt;                       \

            uint32_t passed_cycles = current_stamp - last_stamp;                        \

                                                                                        \

            if (passed_cycles >= delay_cycles)                                          \

            {                                                                           \

                break;                                                                  \

            }                                                                           \

                                                                                        \

            delay_cycles -= passed_cycles;                                              \

            last_stamp = current_stamp;                                                 \

        }                                                                               \

    }                                                                                   \

    while ( 0 )

 

Note that the delay is calculated by the following expression

spi_bb_clock_toggle_delay_cycles = (((CPU_CLOCK_HZ + (config->speed / 2)) / config->speed) + 1) / 2;

The parameter SPI_CLOCK_SPEED_HZ which you set is taken as config->speed.