The CYW43907 product guide provides the overview of CYW43907 features and how to use them in WICED Studio. To learn more about each feature please click on  resource links on this page that will take you to a document/ blog covering given feature in detail.

 

Introduction

The CYW43907, 802.11n Wi-Fi wireless MCU is uniquely suited for single-chip Internet-of-Things applications. It supports all rates specified in the IEEE 802.11 a/b/g/n specifications.The device includes an Arm® Cortex®-R4 MCU dedicated for applications, a single stream IEEE 802.11n MAC/baseband/radio, a dual-band 5 GHz and 2.4 GHz transmit power amplifier (PA), and a receive low-noise amplifier (LNA). Device has 2 MB RAM to support memory intensive applications for example audio, any application that needs large buffer for data or involves intensive algorithms.

 

    • Block diagram

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System Resources and Peripherals

          For power management of different resources, CYW43907 consists of Power Management Unit (PMU).The Power Management Unit (PMU) core manages power and clock resources for the entire chip, including Clock/Reset management and Power Managment.  PMU reduces power consumption through dynamic clock control, rapidly switching among different internal clock frequencies in response to current system bandwidth and latency requirements.

 

          After the device is powered on, ROM Bootloader executes first. Then application gets loaded from SFlash to RAM. This behavior slightly differs between warm boot and cold boot. Always ON Ram contains warm  bootloader which is loaded after ROM Bootloader if it is warm boot.

 

                   The two subsystems– APPS and WLAN – can transition into different low-power operation states independently.

Depending on different power save modes current consumption in CYW43907 varies. Different low power save modes and their details are described in detail in Application note. There is also another Application note available inside of WICED Studio in path WICED-Studio-6.0\43xxx_Wi-Fi\doc\WICED-Powersave-App-Note.pdf

 

          Over The Air (OTA) update is the wireless delivery of new application or data to device. Together OTA and OTA2 offer features including failsafe operation. OTA2 can update all parts of system excluding Bootloader. However, OTA2 implementation requires nearly 8 MB memory.

 

               CYW43907 supports both JTAG and SWD for connecting a JTAG debugger to both sub systems. JTAG_SEL pin and TAP_SEL pin should be set to '1' state. JTAG_SEL is exposed on a dedicated physical pin. TAP_SEL uses the GPIO_8 physical pin. If JTAG is not used then JTAG_SEL should be connected to ground. Debugging through JTAG using Olimex connector is supported from inside of WICED Studio.

 

Peripherals

  • Cypress Serial Interface

          There are two I2C-compatible and two SPI Compatible interfaces available on CYW43907. I2C can work upto 400 Kbps and SPI upto 26 MHz with 25 ns hold time. Bit Banging is also available on the same pins using the driver available from WICED Studio. Both SPI and I2C compatible interfaces can act as Master and their drivers are available from WICED Studio.

 

          There are three UART ports available on CYW43907 - fast UART, slow UART and GCI UART. Fast UART can support speeds upto 3 Mbps, has 64 bytes deep buffer and also 4 wire UART. Slow UART can support upto 115.2 Kbps. UART pins are however multiplexed on GPIOs and other pins.

 

  • USB 2.0

          CYW43907 has both USB host and device controller. CYW43907 can operate in the host-only, device-only, and dual-role device (DRD) modes. In DRD mode, the CYW43907 can be configured as either the host or a device on the fly but must remain in the same mode until the next boot cycle.

 

         CYW43907 provides up to six independent pulse width modulation (PWM) channels. Each PWM channel is a square wave generator. Each channel has capability to create different duty cycle waveforms. In addition adjacent PWM channels can be configured to be differential/complementary. They can be independently or synchronously driven.

 

          CYW43907 integrates a high performance Ethernet MAC controller. PHY needs to be located external to the chip which is interfaced through Media Independent Interface (MII) or a Reduced Media Independent Interface (RMII). The controller can transmit and receive data at 10 Mbps and 100 Mbps.

 

  • GPIO
    • There are 17 GPIOs avaibale in CYW43907. Some of them are used as Bootstrap pins. JTAG lines are also multiplexed on to GPIO lines. Please refer to CYW43907 Datasheet for more information.

 

WLAN subsystem

          CYW43907 provides support for single and dual antennas. Software Antenna Diversity is supported through WICED Studio. There are different NVRAM parameters available in WICED Studio for setting different options related to Software Antenna Diversity.

 

Additional topics

          CYW43907 supports loading more than one application into external flash and executing one among them.

          External display can be connected to CYW43907 through I2C for different graphics applications.

          CYW43907 has an external SD card slot which can be used to load different files and directories.

          Due to inappropriate clock setting, CYW43907 may enter in a state when it cannot be programmed any longer. To download further programs in CYW43907, unbricking has to be done.