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The I2S or PCM clock of CYW20706 can’t be set by the application. The audio firmware / hardware control this based on the current audio stream bit depth, sample rate, number of channels etc.




On the CYW20706, I2S is used for routing audio samples while using the A2DP profile. The direction of the audio samples depends on the A2DP role of the device. If the CYW20706 is configured as a source, then audio samples are received from a hardware codec over I2S. If configured as a sink, then the audio samples are transmitted from CYW20706 to the hardware codec.

In A2DP applications, the audio data is routed over I2S by default and or when the route is configured as AUDIO_ROUTE_I2S. CYW20706 can be configured as the I2S master by setting the is_master flag to TRUE. CYW20706 will then generate the bit clock or SCK based on the sampling frequency negotiated over the A2DP profile. For example, if the CYW20706 negotiates a sampling frequency of 44.1 kHz with the peer Bluetooth device during codec negotiation, then the I2S clock frequency will be set to 44.1 kHz by the internal libraries. The bit depth or word length is set to 16, i.e. frame length is fixed to 32 and cannot be modified. The I2S clock in the master mode can either be 

  • 44.1 KHz x 32 bits per frame = 1411.2 KHz
  • 48 KHz x 32 bits per frame = 1536 KHz

In the slave mode, any clock rate is supported up to a maximum of 3.072 MHz.


Note: If CYW20706 is an A2DP source, you can set the sampling frequency in the application firmware. For example, av_app_cb.audio_sf = 'desired sampling frequency'; in ‘ watch ‘ demo




PCM is a standard method used to digitize audio (particularly voice) for transmission over digital communication channels. CYW20706 includes a PCM interface that can connect to linear PCM codec devices either in master or in slave mode. The PCM interface is used for full duplex bi-directional transfer of 8K or 16K voice samples while using the HFP profile.

The CYW20706 uses 13 bits of the 16 bits in each PCM frame. The remaining three bits need to be ignored at the input device and may be filled with 0s, 1s, a sign bit, or a programmed value on the output. The default format is 13-bit 2’s complement data, left justified, filled with 0's and clocked MSB first.

The PCM clock setting will be done internally based on the sample rate in SCO settings. 

If WBS (wide band speech) is enabled, it will use 16K sample rate , otherwise 8K. Check WICED_BT_HFP_HFP_CODEC_SET_EVT  to check whether WBS enabled or not.

Thus the PCM clock can either be

  • 8khz * 16bit * 2(channel) = 256khz (For narrow band speech)
  • 16khz * 16bit * 2(channel) = 512khz (For wide band speech)

This is taken care by the WICED Stack. You just need to enable or disable WBS in the application project.



Posted by SheetalJ_96 Moderator Mar 27, 2019

Disclaimer: This blog applies to following Cypress devices: CYW20706, CYW20719, CYW20735 and BT/BLE modules based on these devices.


Q. Using A2DP, how much is the expected minimum BT audio latency?

A. BT audio latency depends on many parameters like buffering on both source & sink sides, time required for PCM signals to playout, etc. The jitter buffer can be lowered to 4.1kB to give 50ms latency, but this comes with a cost of reduced audio quality. Therefore, in WICED, the jitter buffer is set to 116ms to avoid music interruptions caused by Wi-Fi and other radio sources. Setting it below 60ms will cause the buffer to overrun, a condition in which the buffer is fed with data at a slower rate than required, resulting in loss of audio.


Q. How to connect external host to Cypress BT chips?

A. Cypress BT chips can be used in host mode, where BT controller is controlled by an external host. We have a combo chip CYW943907WAE3 (check the workspace 43xxx_Wi-Fi), where CYW20707 gets programmed via 43907 MCU. In short, 43907 MCU acts as an external MCU for CYW20707. It takes the BT firmware from /43xxx_Wi-Fi/libraries/drivers/bluetooth/firmware/20706A2/40MHz/bt_firmware_controller.c and executes API bt_firmware_download().

To connect external MCU as host, host and controller should be connected via UART and then BT controller can be programmed by sending commands from Host. Cypress provides tools like ClientControl, CyBluetool for programming the device. Please refer <WICED workspace>/doc/WICED-HCI-Control-Protocol.pdf document for more details.

Note: CYW20707 is not a broad-market chip, but our module vendors like Murata use this chip to integrate it in a SiP along with other Wi-Fi chips. You can use CYW20706 to achieve similar functionalities.


Q. Do Cypress supports AT commands?

A. Cypress devices do not support AT commands. But we have EZ-Serial support for BT/BLE modules like CYBT-343026, CYBLE-022001 and more. Please refer following link for further details:


Q. How can I perform RF testing on Cypress BT devices/modules?

A. You can use mbt (<WICED workspace>/wiced_tools/mbt) or wmbt (<WICED workspace>/wiced_tools/wmbt) tools available in WICED SDK for RF testing. You can also use CyBluetool to allow DUT to enter different modes for regulatory test. Please refer attached pdf for more details.


  1. For BLE, you need to put device in HCI mode to accept commands through UART interface. For classic BT, put the device in Test mode to accept the commands through RF interface. Please refer section “Test Mode Setup” in attached pdf.
  2. MBT uses standard HCI commands and WMBT uses WICED HCI commands defined by Cypress.

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