• After loading HEX file in USB CyConsole the device showing as "Unknown device"

    I am Using CY7C68013A for USB interface and transfer data from FPGA to PC of Bulkloop_VSC C#. at starting the device detecting (photo1) but after i Download the HEX file the device detaching but now it is showing as u...
    last modified by PaKu_3818476
  • 关于CyU3PUsbSendEP0Data()的通道挂起问题

        我正在使用FX3 SDK v1.3.3开发USB2.0的HID应用,在SlaveFIFO的例程上,增加了HID的支持。     通过EP0接收发送report时发现,CyU3PUsbSendEP0Data()函数发送完数据后,要等待19ms左右之后再继续接收report。问题参见:Re: CyU3PUsbSendEP0Data with FX3 SDK Vers...
    last modified by thsh_4007911
  • device not identified after CY7C65630

    I have an application with two boards,  one of them use a CY7C68013, let's call this board A. one of them has a CY7C65630 and CY7C68013 let's call this board B,   the problem is that when I plug the A boar...
    last modified by dasu_2655076
  • We need to replace the CY7C68024 (obsolete) by CY7C68034 for NAND Flash management.

    To move from the CY7C68024 to the CY7C68034, is it necessary to change the printed circuit, to make some programmation.... or is it pin to pin compatible?
    last modified by yvfa_1050526
  • CYUSB3 driver LTSC confirm for CY7C65211

    Would you help to confirm CYUSB3 driver support Long-Term Servicing Channel (LTSC) or not? https://techcommunity.microsoft.com/t5/Windows-IT-Pro-Blog/LTSC-What-is-it-and-when-should-it-be-used/ba-p/293181   Thank...
    last modified by MiSh_300256
  • CY8C68013A 's issue of  Cypress FX2LP No EEPROM Device?

    hi   CYPRESS:     When i use  cypress  CY8C68013A to do myself tool, when i install the kit, it show Cypress FX2LP No EEPROM Device? in my sch , the iic connct to the at24c02 and sc...
    last modified by DaZh_2976111
  • CY7C63813-SXC tray Package Carrier part#

    Have CY7C63813-SXC tray Package Carrier part#  for M/P? Regard,   Kevin
    last modified by KeTs_2342536
  • cy7c65215 Jtag clock speed, is it fixed at 450KHz?

    We use openocd "adaper_khz" to set cy7c65215's jtag clock speed. But the command takes no effect, though openocd doesn't report errors. Measuring the jtag clock with oscilloscope, it is always 450khz. Can we change it...
    last modified by YuCh_4287461
  • CY7C68013A-56PVXC create a hex dump

    Hello everyone,   I have question. Is there any way I can create a CY7C68013A-56PVXC hex dump and how can I create one?What is needed? Also make from the copy hex dump and upload it to another same chip. Hoop so...
    last modified by CrKl_4346426
  • Windows 10 Enterprise 2019 LTSC Driver for CY7C65213

    Hello,   I think that Windows 10 Driver for CY7C65213 (USB-UART LP Bridge Controlle) can be downloaded as follows.   http://www.cypress.com/documentation/software-and-drivers/ez-usb-fx3-software-developmen...
    last modified by HaSh_1328096
  • EZ-USB FX2 iic file not generated(FX3_SDK)

    When FX2 device with FX3 SDK , .hex file is generated but iic file is not generated. I can write program to RAM but can't write to EEPROM because there is no iic file.   Files built with keil can be converted t...
    last modified by hata_3396041
  • CY8C68013A  date send issue?

    hi  Cypress:      在使用CY8C68013A的问题,上位机需要发送512Byte 或者其整数倍的数据才能接受到; 如果发小于512Byte 的数据 则无法接受到, USB的相关协议中应该是需要发送相关操作指令才可以实现非512byte 接受, 客户需要知道怎么进行操作? 是否有相关的 建议; TKS;
    last modified by DaZh_2976111
  • How to disarm previously armed in endpoint1 of FX2LP?

    How to disarm previously armed in EP1IN?
    last modified by MoTa_938296
  • EZUSB Part Selection for USB 2.0 UVC Camera MJPEG Support

    Hi I am interested in using the EZ USB chips for a new design and would like some help choosing the best part that has software example to prove concept. These are the requirements:   - USB 2.0 device (USB 3.0 no...
    last modified by SeSc_4288176
  • fx2lp isochronous aadj with 512 quad buffering and 2 additional transactions per microframe

    Probably answering the question myself, the TRM states that the aadj=1 will check only 1024byte commited buffers but I was wondering if it should work also on 512byte packets /fifo buffers for IN(2) endpoints. It does...
    last modified by HSo_3703166
  • The  date send of  CY7C68013A-56LTXC?

    hi   Cypress:        The problem with cy7c68013a-56ltxc is that the host computer needs to send 512Byte or integer multiple data to receive it. If the data sent is less than 51...
    last modified by DaZh_2976111
  • More information about driver reselling process

    Hello, We designed a device that uses Cypress CY7C68013 chip in order to initiate USB2 high speed communication (30MB/s throughput). We want our users to be able to use the device with Windows 10 64 bit and 32 bit o...
    last modified by AvAh_1250071
  • FX2LP EP1IN problem

    I assume that SIE of FX2LP responds immediately to EP1IN bulk transaction without NACK one or two times soon after "SET_FEATURE(to endpoint81) REQUEST" although firmware does not arm the EP1IN yet. EP1IN is armed in ...
    last modified by MoTa_938296
  • FIFO Slave / GPIF interface clock direction

    Hello,   I am considering using FX3 as a bridge between USB and FPGA. It would be mainly used to pass data from USB to application via FX3 at maximum BW (low traffic in other direction). My project is at bo...
    last modified by chroc_4339966
  • cy7c65215 jtag pin types and connections

    What modes are cy7c65215 jtag's output pins: Open-drain or push-pull? Are they configurable? Also, should we have a pull-up resistor for TDO (jtag master's input pin)?   SCB1 pins: TDO    &...
    last modified by YuCh_4287461