This blog post discusses the capabilities of SPI(Serial Peripheral Interface) in CYW43907.
CYW43907 contains two SPI interfaces:
1) SPI Flash Controller: a dedicated SPI flash controller which can support an external Quad SFlash.
2) CSC-Generic SPI: supports external SPI slave devices. In other words, it can only act as SPI Master.
The SPI Master is supported by the CSC(Cypress Serial Control) .There are two instances of SPI in CYW43907- SPI0 and SPI1
The SPI0 is referenced by WICED_SPI_1 (in WICED Studio) and SPI1 is referenced by WICED_SPI_2 in the platform file.(/43xxx_Wi-Fi/platforms/CYW943907AEVAL1F/platform.c).
SPI Controller supports a fixed SPI MODE : CPOL = 0, CPHA = 0 and 8 bit data read/write.
CPOL = 0: Clock idles at 0, leading edge is a rising edge, and the trailing edge is a falling edge
CPHA = 0: The “out”side changes the data on the trailing edge of the current clock cycle, the “in” side captures data on the leading edge of the clock cycle.
Following table shows the Pin name of SPI0 and SPI1.
|WICED_SPI_1||MURATA Module Partner Pin Name||CYW943907AEVAL1F Pin Header|
|WICED_SPI_2||MURATA Module Partner Pin Name||CYW943907AEVAL1F Pin Header|
Adding SPI to your application in WICED StudioThere are two drivers available in WICED Studio for CYW43907, Bit banging and CSC-GSIO driver. The bit-banging clock frequency is set as 1Mhz by default. To change it refer to the following blog:How to set SPI bit banging clock frequency in 4390X using WICED? For the GSIO driver, the minimum hold time requirement is 25ns. The bit-banging driver is CPU intensive and it is available for only the SPI0(WICED_SPI_1) interface.The drivers available for SPI0 could be selected in the platform file of CYW43907.(/43xxx_Wi-Fi/platforms/CYW943907AEVAL1F/platform.c).
Modify the SPI peripherals structure (platform_spi_peripherals) to select the driver. Following are the drivers available.
a. spi_gsio_driver. ( default)
The SPI API’s are defined in /43xxx_Wi-Fi/WICED/platform/MCU/wiced_platform_common.c.
API documentation included as part of WICED Studio covers these APIs in great detail, here is a high-level description of APIs available for SPI for this device.
a. wiced_result_t wiced_spi_init( const wiced_spi_device_t* spi )
Description: This API can be used to initialize the SPI device. The structure wiced_spi_device_t initializes the SPI port, chip select pin, the SPI device speed, the mode of operation(see below for different modes), and the number of data bits.
An example of initializing wiced_spi_device_t structure:
wiced_spi_device_t spi_device =
.port = WICED_SPI_1,
.chip_select = WICED_GPIO_22, //CS PIN IN 43097
.speed = 10000000,
.mode = ( SPI_CLOCK_RISING_EDGE | SPI_CLOCK_IDLE_LOW | SPI_MSB_FIRST ),
.bits = 8
b.wiced_result_t wiced_spi_transfer( const wiced_spi_device_t* spi, const wiced_spi_message_segment_t* segments, uint16_t number_of_segments ):
Description: This is used to transmit/recieve the data. The initialized SPI device structure, along with message segment structure and the number of data segments are passed to this API. Each message could contain multiple data segments of the specified data width.(This width is initialized while defining the wiced_spi_device_t structure).
c.wiced_result_t wiced_spi_deinit( const wiced_spi_device_t* spi ) Deinitializes the spi interface.
Relevant Macros and Descriptions
WICED SPI Ports:
a) WICED_SPI_1 b) WICED_SPI_2
SPI mode constants and its descriptions:
|SPI Mode Flags||Description|
|SPI_CLOCK_RISING_EDGE||Data sampled at the Rising Edge|
|SPI_CLOCK_IDLE_LOW||Clock Idle State is Low|
|SPI_MSB_FIRST||Data Transfer Direction with MSB first|
|SPI_LSB_FIRST||Data Transfer Direction with LSB first|
|SPI_CS_ACTIVE_HIGH||Chip Select is Active High|
|SPI_CS_ACTIVE_LOW||Chip Select is Active Low|
The attached application demonstrates setting up a SPI master in CYW43907 for communication with an external SPI slave. Follow the instructions added as comments in the code.
spi_new.zip 1.7 K