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CYW43907 GPIO Explained

Posted by VinayakS_26 Moderator Dec 29, 2017

This  blog discusses about the General Purpose Input Output (GPIO) available in CYW43907.

There are 17 GPIO hardware pins available on the CYW43907. The GPIOs can be used to connect to various external devices. Upon power-up and reset, these pins are tristated. Subsequently, they can be programmed to be either input or output pins via the GPIO control register. In addition, the GPIO pins can be assigned to various other functions.These functions can be found in the Pin multiplexing table in CYW43907 datasheet(Section 11). Apart from the functions mentioned in the pin multiplexing table, GPIOs are also used to set bootstrap functions. JTAG pins are also multiplexed onto GPIO.



After power-on reset, all the Pins are configured to function 1. There are 32 GPIO functions (GPIO_0 TO GPIO_31)  in total and the 17 hardware GPIO pins are configured to  GPIO functions GPIO_0 through GPIO_16. Following table shows GPIO Pin Multiplexing (Excerpt from CYW43907 Data Sheet).




The other pins that have GPIO functionality could be seen from the PIN MULTIPLEXING table. They can also be configured to function as a GPIO using the API; wiced_gpio_init()(Described below). Note that this is possible only for those Pins which have GPIO function.


For example, in the above table, PWM3 has GPIO function GPIO_5 and GPIO_21.



Relevant API's and Description:

On CYW943907AEVAL1F, all the pins are referred as WICED_GPIO_1 through WICED_GPIO_51. Refer the pin mapping in the platform located inside of WICED Studio at:


API documentation included as part of WICED Studio covers these APIs in great detail, here is high-level description of APIs available for GPIOs for this device.


1. wiced_result_t wiced_gpio_init( wiced_gpio_t gpio, wiced_gpio_config_t configuration )

Description: To initialize a pin as GPIO. Note that this is possible only for those pins that have GPIO functionality listed in the PIN MULTIPLEXING table. For those pins that have multiple GPIO functionality, the first GPIO function will be invoked. The pin to be configured as GPIO along with the configuration is passed to the API.

The possible configurations are :

GPIO ConfigurationsDescriptions
INPUT_PULL_UPInput with an internal pull-up resistor - use with devices that actively drive the signal low - e.g. button connected to ground
INPUT_PULL_DOWNInput with an internal pull-down resistor - use with devices that actively drive the signal high - e.g. button connected to a power rail
OUTPUT_PUSH_PULLOutput actively driven high and actively driven low - must not be connected to other active outputs - e.g. LED output
INPUT_HIGH_IMPEDANCEInput - must always be driven, either actively or by an external pullup resistor
OUTPUT_OPEN_DRAIN_NO_PULLOutput actively driven low but is high-impedance when set high - can be connected to other open-drain/open-collector outputs. Needs an external pull-up resistor
OUTPUT_OPEN_DRAIN_PULL_UPOutput actively driven low and is pulled high with an internal resistor when set high - can be connected to other open-drain/open-collector outputs.


2. wiced_result_t wiced_gpio_output_high( wiced_gpio_t gpio ):

Description: To toggle the configured GPIO pin high.


3. wiced_result_t wiced_gpio_output_low( wiced_gpio_t gpio ):

Description: To toggle the configured GPIO pin low.


4. wiced_bool_t wiced_gpio_input_get( wiced_gpio_t gpio ):

Description: To configure the GPIO pin as an input pin.


5. wiced_result_t wiced_gpio_deinit( wiced_gpio_t gpio ):

Description: To de-initialize the configured GPIO pin.

This blog discusses how to configure CYW943907AEVAL1F as a USB host and connect a USB device to it. In this blog, we are connecting a HID mouse to CYW943907AEVAL1F. The attached snip application will initialize USB host class driver to get USB mouse position and mouse key input by the user and print the XY-axis position and button pressed on WICED console.


To test USB host functionality, download the usb_host_hid_mouse snip attached to this blog post. Extract and add the downloaded folder in apps folder of WICED Studio 6.0 or later.


To evaluate USB operation on CYW943907AEVAL1F board, some hardware modifications are needed. Refer to blog post Hardware connections for USB evaluation on CYW943907AEVAL1F for the required changes. You won't be able to program the board with micro USB provided after the hardware modifications are done. You can use Olimex ARM-USB-TINY-H debugger or J-Link Segger to program the CYW943907AEVAL1F EVK.


Make the hardware connections to connect Olimex ARM-USB-TINY-H debugger with CYW943907AEVAL1F board as discussed in post OpenOCD -WICED.

To program your device using JTAG, install the drivers using zadig. Connect Olimex debugger and CYW943907AEVAL1F board to your PC/laptop. You can see JTAG device detected in Device Manager as follows.

For downloading the application, make the target as follows:

usb_host_hid_mouse-CYW943907AEVAL1F JTAG=Olimex_ARM-USB-TINY-H download run


Connect a mouse to the host through a Micro USB-B to Female type-A connector.

The WICED console should show the initialization as follows:

Connect the mouse to the port. The console should show connection details and device enumerations.

Type hid_mouse to start the test. You should be able to see the XY-axis coordinates and button state on the console:


The APIs available to configure CYW943907AEVAL1F as USB host are:

1. wiced_result_t wiced_usb_host_init( wiced_usb_user_config_t *config )

This function calls the following USBX driver APIs to initialize USB host:

  • ux_host_stack_initialize(UINT (*system_change_function) (ULONG, UX_HOST_CLASS *)) to initialize the USB host stack.
  • ux_host_stack_class_register(CHAR_PTR class_name, UINT (*class_entry_address) (struct UX_HOST_CLASS_COMMAND_STRUCT *)) to register a USB class to the USB stack. This API is used to register all the host class drivers for USBX implementation. For eg. HUB class, Storage class, HID class, audio class, CDC-ACM class, etc.
  • ux_host_stack_hcd_register(CHAR_PTR hcd_name, UINT (*hcd_function)(struct UX_HCD_STRUCT *), ULONG hcd_param1, ULONG hcd_param2) to register a USB controller to the USB stack. It mainly allocates the memory used by this controller and passes the initialization command to the controller. This API is used to register all the USB20 Host controllers available in the system i.e., OHCI, EHCI

2. static wiced_result_t usb_host_app_event_handler( uint32_t event, void *param1, void *param2 )

This function is an event handler which is called on the occurrence of events like insertion or removal of USB device.

There is an event callback function(wiced_usb_host_usbx_host_evt_callback) in ux_host_stack_initialize. Upon occurrence of an event, wiced_usb_host_usbx_host_evt_callback is called which in turn calls usb_host_app_event_handler to notify the user about specific event.


SPI in CYW43907

Posted by VinayakS_26 Moderator Dec 27, 2017

This blog post discusses the capabilities of SPI(Serial Peripheral Interface) in CYW43907.

CYW43907 contains two SPI interfaces:


1) SPI Flash Controller: a dedicated SPI flash controller which can support an external Quad SFlash.

2) CSC-Generic SPI: supports external SPI slave devices. In other words, it can only act as SPI Master.


The SPI Master is supported by the CSC(Cypress Serial Control) .There are two instances of SPI in CYW43907- SPI0 and SPI1

The SPI0 is referenced by WICED_SPI_1 (in WICED Studio) and SPI1 is referenced by WICED_SPI_2 in the platform file.(/43xxx_Wi-Fi/platforms/CYW943907AEVAL1F/platform.c).


SPI Controller supports a fixed SPI MODE : CPOL = 0, CPHA = 0 and 8 bit data read/write.

CPOL = 0: Clock idles at 0, leading edge is a rising edge, and the trailing edge is a falling edge

CPHA = 0: The “out”side changes the data on the trailing edge of the current clock cycle, the “in” side captures data on the leading edge of the clock cycle.


Following table shows the Pin name of SPI0 and SPI1.

MURATA Module Partner Pin Name
CYW943907AEVAL1F Pin Header


WICED_SPI_2MURATA Module Partner Pin NameCYW943907AEVAL1F Pin Header


Adding SPI to your application in WICED StudioThere are two drivers available in WICED Studio for CYW43907, Bit banging and CSC-GSIO driver. The bit-banging clock frequency is set as 1Mhz by default. To change it refer to the following blog:How to set SPI bit banging clock frequency in 4390X using WICED? For the GSIO driver, the minimum hold time requirement is 25ns. The bit-banging driver is CPU intensive and it is available for only the SPI0(WICED_SPI_1) interface.The drivers available for SPI0 could be selected in the platform file of CYW43907.(/43xxx_Wi-Fi/platforms/CYW943907AEVAL1F/platform.c).



Modify the SPI peripherals structure (platform_spi_peripherals) to select the driver. Following are the drivers available.


     a. spi_gsio_driver. ( default)

     b. spi_bb_driver.



API's available:

The SPI API’s are defined in /43xxx_Wi-Fi/WICED/platform/MCU/wiced_platform_common.c.

API documentation included as part of WICED Studio covers these APIs in great detail, here is a high-level description of APIs available for SPI for this device.


a. wiced_result_t wiced_spi_init( const wiced_spi_device_t* spi )

Description: This API can be used to initialize the SPI device. The structure wiced_spi_device_t initializes the SPI port, chip select pin, the SPI device speed, the mode of operation(see below for different modes), and the number of data bits.

An example of initializing wiced_spi_device_t  structure:

wiced_spi_device_t spi_device =


    .port               = WICED_SPI_1,

    .chip_select    = WICED_GPIO_22, //CS PIN IN 43097

    .speed            = 10000000,


    .bits                 = 8



b.wiced_result_t wiced_spi_transfer( const wiced_spi_device_t* spi, const wiced_spi_message_segment_t* segments, uint16_t number_of_segments ):

Description: This is used to transmit/recieve the data. The initialized SPI device structure, along with message segment structure and the number of data segments are passed to this API. Each message could contain multiple data segments of the specified data width.(This width is initialized while defining the wiced_spi_device_t structure).

c.wiced_result_t wiced_spi_deinit( const wiced_spi_device_t* spi ) Deinitializes the spi interface.


Relevant Macros and Descriptions



SPI mode constants and its descriptions:

SPI Mode FlagsDescription
SPI_CLOCK_RISING_EDGEData sampled at the Rising Edge
SPI_CLOCK_IDLE_LOWClock Idle State is Low
SPI_MSB_FIRSTData Transfer Direction with MSB first
SPI_LSB_FIRSTData Transfer Direction with LSB first
SPI_CS_ACTIVE_HIGHChip Select is Active High
SPI_CS_ACTIVE_LOWChip Select is Active Low


The attached application demonstrates setting up a SPI master in CYW43907 for communication with an external SPI slave. Follow the instructions added as comments in the code.

In present WICED the SPI bit banging clock frequency is set to 1MHz and cannot be changed directly by changing SPI_CLOCK_SPEED_HZ when initializing SPI using wiced_spi_init():


wiced_spi_device_t spi_device =


.port = WICED_SPI_1,

.chip_select = WICED_GPIO_16,



.bits = 8,


wiced_result_t status = wiced_spi_init( &spi_device );


The delay is not set because the macro call SPI_BB_DELAY( cycles ) is not implementing any required delay. For this to enable, one need to define the following macro in platform_spi_i2c.c file (\WICED-Studio-5.0\43xxx_Wi-Fi\WICED\platform\MCU\BCM4390x\peripherals\platform_spi_i2c.c)



This macro will enable the following

#define SPI_BB_DELAY( cycles )                                                          \

    do                                                                                  \

    {                                                                                 \

        uint32_t delay_cycles = cycles;                                                 \

        uint32_t last_stamp  = PLATFORM_APPSCR4->cycle_cnt;                             \


        while (delay_cycles != 0)                                                       \

        {                                                                               \

            uint32_t current_stamp = PLATFORM_APPSCR4->cycle_cnt;                       \

            uint32_t passed_cycles = current_stamp - last_stamp;                        \


            if (passed_cycles >= delay_cycles)                                          \

            {                                                                           \

                break;                                                                  \

            }                                                                           \


            delay_cycles -= passed_cycles;                                              \

            last_stamp = current_stamp;                                                 \

        }                                                                               \

    }                                                                                   \

    while ( 0 )


Note that the delay is calculated by the following expression

spi_bb_clock_toggle_delay_cycles = (((CPU_CLOCK_HZ + (config->speed / 2)) / config->speed) + 1) / 2;

The parameter SPI_CLOCK_SPEED_HZ which you set is taken as config->speed.


Clock and PMU in CYW43907

Posted by SheetalJ_96 Moderator Dec 11, 2017

This blog post provides overview of Clock, PMU and Oscillators/crystals in CYW43907.



The CPU clock frequencies for APPS core can be configured to one of five options: 60MHz, 80MHz, 120MHz, 160MHz, 320MHz.

PLATFORM_CPU_CLOCK_FREQUENCY parameter must be set to required frequency in file platform_config_bsp_default.h.

For example, to set APPS CPU Frequency to 320MHz , define should be the following




Power Management Unit (PMU)

The Power Management Unit (PMU) core manages power and clock resources for the entire chip, including Clock/reset management and power management.The CYW43907 has an advanced PMU sequencer, which automatically controls the power switches of all resources.



CYW43907 uses an external crystal of 37.4 MHz to provide a frequency reference. It is used for generating all radio frequencies and normal operation clocking.

As an alternative to a crystal, an external precision frequency reference can be used, provided that it meets the phase noise requirements. Please refer to the CYW43907 Datasheet for exact requirements.

Along with external crystal, CYW43907 uses a secondary low power oscillator (LPO) for low power mode timing. The internal LPO frequency range is approximately 33 kHz ± 30%, 32.768 kHz to be exact.


CYW43907 I2C Operation

Posted by VinayakS_26 Moderator Dec 8, 2017

This blog post discusses connecting CYW43907 to an I2C Slave. Cypress Serial Control (CSC) is an I2C compatible serial interface in CYW43907 and supports up to 400 KHz. CSC supports only I2C master that can be used to communicate with external I2C slaves. There are two instances of CSC blocks – I2C0 and I2C1.


I2C0 – This instance of I2C supports speeds such as  10 KHz, 100 KHz, and 400 KHz speed. I2C0 supports repeated start, however, it does not support clock stretching. Physical I2C0 pins are multiplexed with other functions(which could be found in the Pin Mux Table of CYW43907) and can be used as General Purpose I/Os(GPIO) if I2C0 is not being used by the application.


I2C1 – I2C1 also supports such as 10 KHz, 100 KHz, and 400 KHz speed. It does not support Repeated start and Clock stretching. I2C1 uses fixed function pins.



A bit banging I2C driver is also supported in WICED Studio that can be used for the applications that need to support clock stretching. Only I2C0 pins can be used for the bit-banging interface.


Pin List

The I2C pins are pulled up using 4.7K resistors in CYW943907AEVAL1F EVK.(as shown in the following figure).


I2C Interface
MURATA Module Pin Name
Pin Header
I2C0_SCLKI2C_0_SCLJ6. 23
I2C1_SCLKI2C_1_SCLJ12 .9





Adding I2C to your application in WICED Studio

Wiced Studio supports GSIO (CSC) based I2C or bit-banging. The I2C bit-banging driver is more CPU Intensive than the default hardware driver, so it is recommended to use I2C bit-banging only when the slave requires clock stretching. Note that I2C1 doesn't support bit-banging and hence the following options are applicable only for I2C0 interface.

The drivers available for I2C0 could be selected in the platform file of CYW43907.(/43xxx_Wi-Fi/platforms/CYW943907AEVAL1F/platform.c)

Modify the I2C peripherals structure (platform_i2c_peripherals)

  1. i2c_gsio_driver.(default)
  2. i2c_bb_driver.(bit-banging driver)




API’s available


In WICED Studio, physical I2C0 is referred as WICED_I2C_1 and I2C1 is referred as WICED_I2C_1 and must be used accordingly with APIs.

I2C API’s are defined in /43xxx_Wi-Fi/WICED/platform/MCU/wiced_platform_common.c.

API documentation included as part of WICED Studio covers these APIs in great detail, here is high-level description of APIs available for I2C for this device -

1.wiced_result_t wiced_i2c_init (const wiced_i2c_device_t * device)

Description: Initializes an I2C interface for communication as a master. The I2C port, speed modes, start address, addressing width along with the mode of operation (with or without DMA) for the interface is configured using this API. The API resets the I2C Pins to remove any previous states on the pins.


2.wiced_result_t wiced_i2c_write (const wiced_i2c_device_t* device, uint16_t flags, const void* buffer, uint16_t buffer_length )

Description: Writes data over the i2c interface. The start byte is (0000001) which pulls the SDA line low while the clock is high hence meeting the start condition. This is followed by the slave address. The data bytes are then transmitted to the slave. The stop condition is generated if the slave NACKs or the data transaction

completes through its entire length. The master sends a dummy byte before the stop condition is generated. It supports repeated start as well where the sender transfers multiple data bytes without sending the stop bit in between transfers. The Repeated start is supported only in I2C0 interface.

The flags that need to be passed to the API for generating the stop and start conditions respectively: WICED_I2C_STOP_FLAG, WICED_I2C_START_FLAG, WICED_I2C_REPEATED_START_FLAG


3.wiced_result_t wiced_i2c_read( const wiced_i2c_device_t* device, uint16_t flags, void* buffer, uint16_t buffer_length )

Description: Read data over an I2C interface from the slave corresponding to the slave address.  The transaction begins with a start byte from the master, followed by slave address. Data is read from the slave. This continues till the entire length of data is read or the slave NACKs. A dummy byte is sent by the master, before generating a stop condition. The flags that need to be passed to the API for generating the stop and start conditions respectively: WICED_I2C_STOP_FLAG, WICED_I2C_START_FLAG, WICED_I2C_REPEATED_START_FLAG.


4. wiced_result_t wiced_i2c_transfer( const wiced_i2c_device_t* device, wiced_i2c_message_t* messages, uint16_t number_of_messages )

Description: Used to do read/write data over an I2C interface. It supports repeated start condition where the sender transfers multiple data bytes without sending the stop bit in between transfers. The repeated start condition can only be generated in I2C0 interface.


5. wiced_bool_t wiced_i2c_probe_device( const wiced_i2c_device_t* device, int retries )

Description: Checks whether the device is available on a bus or not. This reads 2 bytes of data from the addressed slave. The slave won’t be acknowledged if it isn’t on the I2C Bus in which case the API returns 0.



Relevant Macros and Flags:


(a) WICED_I2C_1(b) WICED_I2C_2


Addressing and Speed modes

Address width available for addressing the slave is set using the following enum flags.(For both GSIO and BB Drivers).





Speed Modes available for the two drivers (Bit banging and GSIO) and the corresponding enum flags.



The application attached reads the ADC output via an I2C interface and display in a webpage. Follow the instructions added as comments in the code.

This blog post discusses the antenna diversity feature available in CYW43907, streamlined for robust Wi-Fi connectivity. CYW943907AEVAL1F has two PCB antennas to improve the quality and reliability of a wireless link in a non-static environment. In this device, a running average SNR  is maintained for each antenna amongst which antenna with better SNR is chosen to support changing environmental conditions.

Hardware Schematic

The CYW943907AEVAL1F EVK has provision for two external antennas along with the on-board PCB antennas (ANT 0 & ANT 1). Two external antennas are connected to the J1 and J2 connector which has an internal switch connected to it. When an External antenna is connected to J1 and J2 PCB antennas are automatically dis-connected.

Note: After connecting the external antennas in the J1 and J2 connector, please make sure I and O pins of J1/J2 are shorted. Else press the external antennas properly. The CYW43907 has ANT0_DIV_RF_SW_CTRL_4, ANT1_DIV_RF_SW_CTRL_5 control signals which are routed to an SPDT switch (U7) which works based on the following truth table.

VCON1 (5 of U7)

VCON2 (2 of U7)

ANT0 (4 of U7)ANT1 (3 of U7)


NVRAM Parameters

For Antenna diversity to be enabled following NVRAM parameters should be enabled. Please refer to following link for more details about NVRAM parameters

  1. swdiv_en:  0 - disable software diversity; 1 - enable software diversity
  2. swdiv_gpio: specify which GPIO pin will be used for software diversity control (for CYW943907AEVAL1F swdiv_gpio = 0 because we are not controlling the antenna diversity through GPIO)
  3. swdiv_swcntrl_en: diversity mode control variety; 4390x is using mode 2 (controlled by Phy layer)
  4. swdiv_swctrl_ant0, swdiv_swctrl_ant1=1: entries used as shared memory setting for ucode activity, now uses mode 1 (swdiv_swctrl_ant0 = 0, swdiv_swctrl_ant1 = 1)


A sample application is attached to this blog post which calls the IOCTLs to check the active antenna. Please refer to How to use IOCTL commands in CYW43907  to understand the way APIs are being used. The definitions of the used IOCTLs are provided below.


WLC_SET_ANTDIV-1: default antdiv setting; 0: Force reception on antenna 0; 1: Force reception on antenna 1; 2: Start diversity reception with antenna 1; 3: Start diversity reception with antenna 0
WLC_GET_ANTDIVReturns the current antenna diversity method in use
WLC_GET_RX_ANTReturns last used RX antenna



In our environment, some attenuators are introduced in one of the two antenna paths; hence the antenna diversity algorithm should select the other antenna after a brief settling period which can be displayed in the oscilloscope if you probe 2nd and 5th pin of U7 (shown in below image). 

WhatsApp Image 2017-12-06 at 3.30.40 PM (2).jpeg

WhatsApp Image 2017-12-06 at 3.30.40 PM (1).jpeg

So, by probing the pins of U7, the user can match the console log with the physical signals going into the antennas.


WL commands for antenna diversity

Following are the WL commands that are used to control antenna diversity instead of being controlled by application.

  1. wl antdiv <value>
    • 0 Forces the use of antenna 0
    • 1 Forces the use of antenna 1
    • 3 Automatic selection of antenna diversity
  2. wl swdiv_reset_stats - Resets the antenna diversity statistics
  3. wl swdiv_stats - returns the antenna diversity related statistics




This blog discusses about network interface through Ethernet with CYW943907AEVAL1F.

The CYW43907 integrates a high performance Ethernet MAC controller. The controller interfaces to an external PHY either over a

Media Independent Interface (MII) or a Reduced Media Independent Interface (RMII). The controller can transmit and receive data at

10 Mbps and 100 Mbps. Below table shows the signal descriptions for CYW43907 Ethernet MAC.


Signal Name
RMII_G_RXCIMII receive clock
RMII_G_COLIMII collision detection
RMII_G_CRSIMII carrier sense
RMII_G_TXCIMII/RMII transmit clock
RMII_G_TXD0OMII/RMII transmit signal
RMII_G_TXD1OMII/RMII transmit signal
RMII_G_TXD2OMII transmit signal
RMII_G_TXD3OMII transmit signal
RMII_G_RXD0IMII/RMII receive signal
RMII_G_RXD1IMII/RMII receive signal
RMII_G_RXD2IMII receive signal
RMII_G_RXD3IMII receive signal
RMII_MDIOI/OMII/RMII management data
RMII_MDCOMII/RMII management clock
RMII_G_TXENOMII/RMII transmit enable
RMII_G_RXDVIMII/RMII receive data valid






Download the attached zip file, extract to folder tcp_client_ethernet and add the folder to <WICED SDK>/43xxx_Wi-Fi/apps/snip.



Open tcp_client_ethernet.c and follow application instructions mentioned in the source code.

Appl Instructions.JPG


Once the program is successfully compiled and downloaded. Observe the serial terminal for message logs.

serial terminal.JPG


At the same time observe the message logs of TCP echo server which looks as below,




Application Details


I. The macro TCP_SERVER_IP_ADDRESS in #define TCP_SERVER_IP_ADDRESS MAKE_IPV4_ADDRESS(192,168,1,2) definition contains the IP address of TCP echo server.

II. The device_init_ip_settings in the following declaration sets the provided IPv4 address to CYW943907AEVAL1F. Assign ip_address, netmask and gateway to device_init_ip_settings depending the on the gateway and netmask values of your AP/router.


The netmask and gateway values can be found by using the command ipconfig  in the command window of PC (TCP Server) connected to the same AP as CYW943907AEVAl1F.



III. wiced_core_init( ) initializes platform related APIs, RTOS functions and the device configuration table.

IV. wiced_network_init( ) initializes the network interface and creates packet pools for transmission and reception.

V. The API wiced_network_up( WICED_ETHERNET_INTERFACE, WICED_USE_STATIC_IP, &device_init_ip_settings ) brings up the network as WICED_ETHERNET_INTERFACE with the IP configuration as WICED_USE_STATIC_IP and initializes IP settings to device_init_ip_settings. IP configurations can be changed to WICED_USE_EXTERNAL_DHCP_SERVER_RESTORE or WICED_USE_EXTERNAL_DHCP_SERVER and NULL can be passed to wiced_network_up() instead of &device_init_ip_settings.

Note: The network IP configuration can be changed to WICED_USE_EXTERNAL_DHCP_SERVER_RESTORE or WICED_USE_EXTERNAL_DHCP_SERVER as below.


WICED_USE_EXTERNAL_DHCP_SERVER_RESTORE uses an external DHCP server and restores the last saved DHCP state. Since IP configuration is set to external DHCP server, NULL is passed instead of device_init_ip_settings in wiced_network_up () and device_init_ip_settings definition has to commented.


VI. The API wiced_tcp_create_socket( &tcp_client_socket, WICED_ETHERNET_INTERFACE ) creates a TCP socket over the network Ethernet interface.

VII. The API wiced_tcp_bind( &tcp_client_socket, TCP_SERVER_PORT ) binds tcp_client_socket to the local port TCP_SERVER_PORT (50007).

VIII. The API wiced_rtos_register_timed_event() registers a function that will be called at a regular interval.

IX. The API wiced_tcp_connect( &tcp_client_socket, &server_ip_address, TCP_SERVER_PORT, TCP_CLIENT_CONNECT_TIMEOUT ) establishes connection between client and server over predefined over defined ports.

X. The API wiced_packet_create_tcp(&tcp_client_socket, TCP_PACKET_MAX_DATA_LENGTH, &packet, (uint8_t**)&tx_data, &available_data_length) creates a TCP packet by automatically allocating memory for the tx_data.

XI. wiced_packet_set_data_end(packet, (uint8_t*)tx_data + strlen(tx_data)) sets the end of the data portion.

XII. The API wiced_tcp_send_packet(&tcp_client_socket, packet) sends the TCP data , if the data transmission fails the packet will be deleted by wiced_packet_delete(packet) and connection will be closed by wiced_tcp_disconnect(&tcp_client_socket).

XIII. The contents of the received packet will be retrieved by the API wiced_packet_get_data(). After retrieving the contents in rx_data[ ], packet will be deleted and connection will be disconnected.

XIV. AP and Ethernet could be brought up together by following the steps below.

     1. Define a variable for access point IP settings as below,


     2. Bring up network with interface as WICED_AP_INTERFACE, IP configuration as WICED_USE_INTERNAL_DHCP_SERVER and static IP interface as ap_ip_settings.

          ap network up.JPG



Posted by RaktimR_11 Moderator Dec 5, 2017

This blog post provides an overview of the UART interfaces available in CYW43907, which has three UART ports and a sample application is provided to transmit data using any one of the three UART ports.

  1. Slow UART
    1. 16650 compatible 2-wire
    2. RX and TX buffers are both of 1 byte
    3. Can support 115.2 Kbps baud rate
  2. Fast UART
    1. 4 wire (TX/RX/CTS/RTS) UART
    2. Can support 3 Mbps baud rate
    3. RX and TX buffers are both of 64 bytes
    4. Supports interrupts and HW handshaking
    1. Typically used for WLAN/BT coexistence.

The tables below display the pin assignment of CYW943907AEVAL1F kit for the above mentioned three UART ports.


MURATA Module Pin NameWICED Header


WICED_UART_2 (Fast UART)MURATA Module Pin NameWICED HeaderArduino Header


WICED Header


If the user wants to use Fast or GCI UART on this platform, they can choose the clock frequency based on the allowable baud rate error which is provided in the following tables. If the user wants to save on the active power consumption, it is advisable to go for the CLOCK_ALP (can be modified in platform_uart.c).


Rate Error when src_clk = CLOCK_ALP



Nominal Baud RateTarget Baud RateActual Baud Rate
Rate Error


Rate Error when src_clk = CLOCK_HT



Nominal Baud RateTarget Baud RateActual Baud RateRate Error




A sample application is provided in this blog to demonstrate the usage of the WICED UART APIs to send characters on the UART. By default, Slow UART will be used for data transmission; based on the user choice (USER_1 button press), fast UART, GCI UART, slow UART ports will be selected to transmit the same data.


The APIs available for configuring a UART is available in the location


  1. wiced_uart_init(wiced_uart_t uart, const wiced_uart_config_t* config, wiced_ring_buffer_t* optional_rx_buffer )
    1. uart: The interface which should be initialized, platform header file enumerates interfaces from WICED_UART_0 to WICED_UART_MAX.
    2. config: UART configuration structure, defined in WICED/platform/include/platform_peripheral.h
    3. optional_rx_buffer: Pointer to an optional RX ring buffer
  2. wiced_uart_transmit_bytes( wiced_uart_t uart, const void* data, uint32_t size )
    1. data: Pointer to the start of data
    2. size: Number of bytes to transmit
  3. wiced_uart_receive_bytes( wiced_uart_t uart, void* data, uint32_t* size, uint32_t timeout )
    1. data: Pointer to the buffer which will store incoming data
    2. size: Specifies number of bytes to receive; returns number bytes received and placed in the data buffer
    3. timeout: Timeout in milliseconds. WICED_WAIT_FOREVER and WICED_NO_WAIT can be specified for infinite and no wait.
  4. The definitions of the above APIs are found in



To access STDIO_UART using the generic UART APIs, it is necessary to add a global define WICED_DISABLE_STDIO in the

This post discusses about how to configure CYW943907AEVAL1F board as USB device and PC/laptop as USB host. After programming the device, CYW943907AEVAL1F acts as HID keyboard. It prints alphabets ‘a’ to ‘z’ after pressing USER_1 and prints digits ‘1’ to ‘0’ after pressing USER_2 on any text editor on PC/laptop.


To evaluate USB operation on CYW943907AEVAL1F board, some hardware modifications are needed. Refer to blog post Hardware connections for USB evaluation on CYW943907AEVAL1F for the required changes.


Make the hardware connections to connect Olimex ARM-USB-TINY-H debugger with CYW943907AEVAL1F board as discussed in post OpenOCD -WICED.


For initializing device as HID keyboard, wiced_usb_device_hid_keyboard_init() function is called. There are different APIs and functions used within this function to initialize the USB device stack, USB DCI (Device Controller Interface) resources and USBX device controller. hid_keyboard_callback() is the function used to define HID class parameters for keyboard. In function wiced_usb_device_usbx_evt_callback(), different callback events are defined based on the state of the USB device like reset, attached, configured, etc.


The APIs available to configure CYW43907 as USB device are as follows:

1. ux_system_initialize (VOID *non_cached_memory_pool_start, ULONG non_cached_memory_size, VOID *cached_memory_pool_start, ULONG cached_memory_size)

          USBX has its own memory manager. The memory needs to be allocated to USBX before the host or device side of USBX is initialized. USBX memory manager can accommodate systems where memory can be cached. This API initializes USBX memory resources with non-cached and cached memory pool.

     a. non_cached_memory pool start - Beginning of non-cached memory

     b. non_cached_memory_size - size of memory needed

     c. cached_memory_pool_start - Beginning of cached memory

     d. cached_memory_size - size of memory needed


2. ux_device_stack_initialize (UCHAR * device_framework_high_speed, ULONG device_framework_length_high_speed, UCHAR * device_framework_full_speed, ULONG device_framework_length_full_speed, UCHAR * string_framework, ULONG string_framework_length, UCHAR * language_id_framework, ULONG language_id_framework_length, UINT (*ux_system_slave_change_function)(ULONG), UX_USER_CONFIG_DEVICE *user_config_device)

          This API is used to initialize the USB device stack. It mainly provides the stack with the device framework for the USB function

     a. device_framework_high_speed - pointer to high speed framework

     b. device_framework_length_high_speed - Length of the high speed framework

     c. device_framework_full_speed - pointer to full speed framework

     d. device_framework_length_full_speed - Length of the full speed framework

     e. string_framework - pointer to string framework

     f. string_framework_length - Length of the string framework

     g. language_id_framework - pointer to string language framework

     h. language_id_framework_length - Length of the string language framework

     i. ux_system_slave_change_function - function to be called when the device state changes

     j. user_config_device - user configured device data


3. ux_dcd_bcm4390x_initialize (ULONG dcd_io, ULONG parameter)

         This API is used to define USB Device Controller Interface (DCI) resource.

     a. dcd_io - DCI resource address

     b. parameter - information about DCI resource


Download the usb_device application attached with this blog post. Extract and add the downloaded folder in apps folder of WICED Studio 6.0 or later.

To program your device using JTAG, install the drivers using zadig. Connect Olimex debugger and CYW943907AEVAL1F board to your PC/laptop. You can see JTAG device detected in Device Manager as follows.

Create the make target as follows:

          usb_device-CYW943907AEVAL1F JTAG=Olimex_ARM-USB-TINY-H download run


Download the program to CYW43907 by double clicking on above make target. After you download the program, you will see WICED device acting as HID keyboard in Device Manager.

Open any text editor in your PC/laptop. You should see alphabets or digits getting printed after pressing USER_1 or USER_2.


Note: The USB Device functionality does not work for device classes (For instance, mass storage class) that use a transfer data length which is a multiple of the maximum packet size. Currently there is no workaround for this issue. The issue is being investigated and will be updated once there is a solution or workaround identified.

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