CYW20719 supports SPI interface to communicate with other SPI devices. This block can be used to communicate with SPI-based sensors such as temperature sensors, motion sensors, and so on. The SPI blocks support the following features:

  • Three-wire (master) and four-wire (master and slave) SPI interface
  • Master and slave modes
  • Configurable SCK polarity and phase
  • Configurable LSB- or MSB-first transfer
  • 1024 byte transmit buffer and 1024 byte receive buffer (shared with HCI UART)

 

CYW20719 provides SPI APIs to choose between 2 SPI Hardware blocks. spi_interface_t allows the programmer to choose between SPI1 and SPI2. Each of the SPI Utility APIs will have an argument to choose between the 2 SPI blocks.

 

The SPI  block can be used as a generic master or a generic slave. Any LHL GPIOs can be used for the SPI interface. ModusToolbox provides a list of parameters and APIs to access the SPI 1 driver. click Help > ModusToolbox API Reference > WICED API Reference in ModusToolbox IDE and navigate to Peripheral SPI section under components > Hardware Drivers.

The SPI  block can be initialized in the required configuration using the function wiced_hal_pspi_init().

 

1.1.  Generic Slave Operation

 

TX operation

As a generic slave, data is transferred to the host when:

  1. There is data in the TxFIFO
  2. The TxFIFO is enabled
  3. The host toggles SPI_CLK and SPI_CSN is asserted

If condition (1) is false, but conditions (2) and (3) are true, a data underflow condition occurs.  The transmit APIs can place data in the TxFIFO. The wiced_hal_pspi_slave_tx_data() API can be used to transmit the data.

RX operation

As a generic slave, data is received from the host when:

  1. There is space in the RxFIFO
  2. The RxFIFO is enabled
  3. The host toggles SPI_CLK and SPI_CSN is asserted

If condition (1) is false, but conditions (2) and (3) are true, a data overflow condition occurs. Data can be retrieved from the RxFIFO using manual firmware reads. The wiced_hal_pspi_slave_rx_data() API can be used to receive the data.

 

1.2.  Generic Master Operation

 

In generic master mode, it is up to the firmware to assert the CS to various peripherals. The CS and INT pins can be used as GPIOs when in master mode. Three types of master transactions are available.

TX-Only

When data only needs to be sent, the SPI block is in TX-Only mode.  In this mode:

  1. TxFIFO must be enabled
  2. RxFIFO must be disabled

In this configuration, the SPI block will transmit any data placed in the TxFIFO.  Data can be placed in the TxFIFO using manual FW writes. The wiced_hal_pspi_tx_data() API can be used to transmit the data as a master.

When the TxFIFO becomes empty, SPI_CLK is paused at a byte boundary until more data is placed in the TxFIFO.  No data is stored in the RxFIFO.

RX-Only

When data only needs to be received, the SPI block is in RX-Only mode.  In this mode:

  • TxFIFO must be disabled
  • RxFIFO must be enabled

In this configuration, the SPI block will retrieve TransmissionLength bytes from the slave.  Data can be retrieved from the RxFIFO using manual firmware reads. The wiced_hal_pspi_rx_data() API can be used to receive the data as a master.

The data stream will be paused if the RxFIFO becomes full. The data stream will resume when there is space in the RxFIFO. No data is sent in this mode.

Full-Duplex

When data needs to be sent and received simultaneously, the SPI block is in full-duplex mode.  In this mode:

  • TxFIFO is enabled
  • RxFIFO is enabled

In this configuration, the SPI block will transfer data to both FIFOs if there is:

  1. Space in  RxFIFO
  2. Data in TxFIFO

If either of these conditions becomes false, SPI_CLK is paused until both conditions become true again. The wiced_hal_pspi_exchange_data() API can be used to send and receive data simultaneously.

 

Note: Since SPI and HCI UART use the same buffer, they cannot be used together.