The CYW20719 and CYW20735 devices have two types of GPIOs: 40 LHL GPIOs and 8 Arm GPIOs.
The number of LHL GPIOs and Arm GPIOs available in the device depends on the package. For example, CYW20719 QFN 40 has 16 LHL GPIOs whereas CYW20735 QFN60 has 23 LHL GPIOs.
LHL GPIOs are different from Arm GPIOs in few ways. LHL GPIOs can operate in low power modes and support mux-able peripherals, whereas Arm GPIOs can operate only in active mode with limited functionality. The functionalities that can be brought out to LHL I/Os are I2C, SPI, PUART, ACLK., and so on.
The wiced_hal_gpio_select_function() API can be used to map the functionality to specific pins.
Both LHL and ARM GPIOs are enumerated in wiced_bt_gpio_numbers_t() list in wiced_hal_gpio.h.
Though the SDK offers configuring all the I/Os, the selection of pins in an application needs to be made based on the following constraints with respect to the device:
Certain functionalities (for example, ADC input) are supported only on specific LHL I/Os and cannot be routed to other pins.
Only pins P26, P27, P28, and P29 can drive higher current compared to other pins. Refer to the datasheet for more details.
Some of the package pins are double or triple bonded with multiple I/O pads; therefore only one of the bonded pins can be used at a time.
P19, P20, and P39 are reserved for system use, and cannot be used in applications.
For using any pin as a generic GPIO, see the GPIO driver section by navigating to Hardware drivers in Components.