Thought I'd give an introduction for the ADC available on the PSoC 6 architecture. The ADC is a Successive Approximation (SAR) type with 12 bits of resolution. It is an updated and improved version of the SAR ADC found on PSoC 4 devices. The key features are:
Up to 1 million samples per second at a fixed 12 bits of resolution
The programmable analog features of PSoC 6 allow almost every pin to be used as an ADC input. The GPIO pin analog signals can be routed to the ADC through the AMUX busses under software control.
A built in 8 channel hardware sequencer can also automatically scan each channel and stores the results for later CPU processing. An upper and lower limit is also able to be compared with each scan and generate an interrupt if an out of range condition is detected.
Sequencer channels also support hardware averaging and accumulation of up to 256 samples for lower noise or higher resolution and the resulting 16-bit results.
Sequencer allows a software controlled 9th channel to be injected between scans for less frequent measurements. The 9th channel can connect to almost any pin through the AMUX busses.
The ADC provides dedicated connections to the integrated CTBm OpAmps and DAC allowing advanced analog signal effects to be generated and scanned.
Supports single ended and differential conversions. The 8 channel sequencer supports up to 4 differential signals.
Analog reference is selectable to Vdd, Vdd/2, 1.024V, or an external reference provided to a GPIO pin.
Able to read the on chip temperature sensor and supply voltages to allow temperature and voltage based adjustments.
Supports one shot or continuous hardware scan triggering and a variety of conversion complete signals that can be used with interrupts, DMA, or custom logic.
The ADC control signals and data can be routed to the programmable digital logic (UDBs) to create custom scan functionality, and unique automatic processing of conversion data in hardware.
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