• FM25CL64B-G: Block protection bits BP1 and/or BP0 set randomly after write

    Hi,   we are having issues with BP1 and/or BP0 being set seemingly random after a write to the FRAM occured. We have one board design with said FRAM chip and it occures on all of the tested boards to date (aroun...
    last modified by johannes.wittmann_4298601
  • CY7C1061AV33-10ZI part marking

    HI dear friends,   Pls advise what  are the differences between "10ZI" and "10ZXI" parts. Are the "10ZI" parts not Pb-free? But there is square mark (Pb-Free mark) on the parts. Or is it normal?  Pl...
    last modified by extracting77_3886401
  • Minimum Chip deselect time TCS

    I'm working with CY15B116QSN device using 002-26981 preliminary datasheet. I've developed a VHDL FRAM access engine and now i'm simulating the FRAM behaviour. I'm using QSPI access @ 67,5MHz.     In the t...
    last modified by marco.papa_1652691
  • Publish growth pin diagram for 54 TSOP II SRAM package

    Can Cypress provide the projected maximum density pin connections for memory packages to allow customers to attach higher density parts? Higher density parts may be required when customers run out of memory or if the ...
    last modified by user_455868498
  • Top marking conformation

    Hello   Can anyone confirm if the top markings of this component are correct for the component. top marking documents are not helping us to identify it is the correct part.   Part  CY15B104QI-20LPXCES...
    last modified by paul-stocking_4275486
  • CY14B116N-ZSP45XITのAutostore/Hardware RECALLの挙動について

    Autostore: VCC < VswitchとなりStore処理が開始されたとき、 ・Store処理が完了する前に、VCC > Vswitchとなった場合の内部挙動はどうなりますか。  また、SRAMとnonvolatile elementのデータは壊れてしまいますか。   Hardware RECALL: ・VCC > Vswitchとなり、RECALL処理が開始されたとき、   t...
    last modified by user_494564856
  • SPI communication between CY15B104Q-LHXI and PIC16LF18446 - Need help

    Hello, I would like some help to set up or correct my SPI communication. I've been looking for two days now and trying to make changes in vain and I don't know if the problem is in the pin configuration or in the SP...
    last modified by MichaelP.
  • F-RAM at -55°C

    Hi, Cypress doesn't provide serial F-RAM part-numbers working in the -55/+125°C range. The widest range available is the automotive range (-40/+125°C). Is it something impossible with the F-RAM technology ...
    last modified by frederic.bonnin_4136116
  • Regarding working/interfacing with FM25V10 FRAM

    Hi   Im trying to read the device ID  initially to start interfacing with FM25V10 FRAM.   The below mentioned procedure I'm following  to read the devive ID C22400h - with product family,density...
    last modified by vignesh.v_4156156
  • FM25L04B sporadic invalid status register content read via SPI.

    We're using a PIC32MX family MCU and communicating with the F-RAM via SPI.  We can successfully perform hundreds of writes to the F-RAM before we see the device return seemingly invalid content from a RDSR comman...
    last modified by glenn_highland_4216051
  • CY14B256LA chip reader/writer

    Hi Can anyone direct me to a chip programmer supplier that can read/write to the CY14B256LA?   regards,   Tony.
    last modified by tony.petroski_4255986
  • CY15B102Q-SXE Updated IBIS Model?

    I'd like to inquire the IBIS model for CY15B102Q-SXE to perform signal integrity analysis. I was able to find an IBIS model in the developer community forum. However, the typical voltage in the IBIS model is 2.8V as o...
  • CY14B101NAおよびCY14B101LAのSTORE/RECALLの内部動作について

    nvSRAMのSTORE/RECALLは、すべてのアドレス(すべてのデータ)を同時にSTORE/RECALLするのでしょうか。   nvSRAMを使用検討する前に、SRAM+Batteryの運用をしていましたが、 SRAMの際には電源が中途半端に落ちたときなどに、データが全部壊れず、一部のみ壊れることがありました。   SRAMからSONOSへのSTOREが全bit同時に書き込むのであれば、 その後に正...
    last modified by matsubara.t_2997106
  • FM25V20A-DGQ top marking

    Hello! We have a question about top marking on FM25V20A-DGQ We got FM25V20A-DGQ with this marking:   Q5V20A 631094 1731   Is this normal? Unfortunately, we can't find information in Datasheet about "...
    last modified by dienmantil_4242341
  • PN FM25V05-G Revision Letter

    Hello, We are using PN FM25V05-G in our design, but was provided the information for Rev AB of that PN. I have been told that Rev AB is no longer current. Can you please provide the latest revision letter for this...
    last modified by kim.chau_4228871
  • FRAM memory with a unique read-only ID

    Hello!   I'm interested in 16Kbit FRAM with its own unique read-only ID. Detailed information and questions are described in the attached document. What device can you suggest based on the requirements? ...
    last modified by user_271092117
  • FM28V020-TG

    dear   The IC marking we got with C/O TW this time is different with previous C/O CHINA. Why marking with 2 dimples for C/O TW? I can't find datasheet with 2 dimples in website, can provide? thx a lot!
    last modified by jovial29_4195676
  • CY14B104LA communication issue with ARM processor connected via GPMC as External peripheral interface

    Hell Experts,   We are using CY14B104LA NVSRAM as external peripheral connected to AM5708 ARM custom SOC via GPMC based on chip select information.   Could you please let me know  the timing parameter...
    last modified by greddyav_4195891
  • CY15V104QSN-108SXIT 包装尺寸图和symbol/footprint 圖面图

    Dears,   请问能否帮忙提供一下CY15V104QSN-108SXIT 包装尺寸图和如下的symbol/footprint 圖面图,(手册里的封装图已经和客户确认过了不行)多谢!                         ...
    last modified by Peter.cao_1489476
  • FM25V10-DG MCD & SGS report

    We can not find FM25V10-DG MCD/PMDD/SGS information on Cypress web-site. https://www.cypress.com/part/fm25v10-g Please help provide these data for customer approve & using this parts. Thanks, Mitchell
    last modified by user_87129