• UART オーバーランエラー - Community Translated (JA)

    Community Translated by  MoTa_728816          Version : **   質問: UART における オーバーランエラーとはどういったものですか? また、どのような対策が必要ですか? 回答: オーバーランエラーは直前の1バイトが UART の受信バッファか...
    PraveenM_86
    last modified by PraveenM_86
  • ADCでのINLとDNLとは - Community Translated (JA)

    Community Translated by  MoTa_728816          Version : **   質問: ADCでの、INLとDNLの意味を教えてください。 回答: DNL - 微分非直線性誤差 (Differential Non-Linearity): 理想的なADCの出力は、幅を持った...
    PraveenM_86
    last modified by PraveenM_86
  • 65-nm Flash Family Behavior During Voltage Irregularities - KBA219071

    Version: **   Question: What should I consider if my system is experiencing voltage irregularities?   Answer: It depends; some you can ignore, while for some you need to do Power-On Reset (POR) or an a...
    JeetendraA_51
    last modified by JeetendraA_51
  • Knowledge Base – Cypress Semiconductor Cage Code - KBA89258

    Version: *B   Question: What is Cypress Commercial and Government Entity Code or CAGE CODE?   Answer: The Commercial and Government Entity Code, or CAGE Code, is a unique identifier assigned to supplie...
    chaitanyav_41
    last modified by chaitanyav_41
  • Bit-banding access to individual bits in peripheral registers for FM0+/FM3/FM4 microcontrollers – KBA220576

    Version: **   Question: When bit-banding is used to access a bit in peripheral registers, which access size (a byte, a half-word or a word) can be used for the bit-banding access?   Answer:   The bit...
    chaitanyav_41
    last modified by chaitanyav_41
  • Programming with KitProg2/MiniProg3 Using LabVIEW™ - KBA218796

    Version: **   Question: How do I program a Cypress device with KitProg2/MiniProg3 by using the LabVIEW software from National Instruments?   Answer: LabVIEW supports the ActiveX method to access the C...
    JyothishK_01
    last modified by JyothishK_01
  • Can the built-in high-speed CR be selected for Master Clock when using the USB Function? - KBA218388

    Version: **   Question: When using the USB function, can we select the built-in high-speed CR for the master clock?    Answer: No. The high-speed CR clock (CLKHC) frequency accuracy does not meet the...
  • Dstc_ClearDreqenbBit() function in PDL 2.1.0 sets DREQENB register bit instead of clearing it - KBA218861

    Version: **   Question: The Dstc_ClearDreqenbBit() function in Peripheral Driver Library (PDL) 2.1.0 sets the DREQENB register bit instead of clearing it. The problem is reproducible on the FM0+ and FM4 family o...
    content.librarian
    last modified by content.librarian
  • Selecting ADC Analog Input Channels 8 Through 15, and 24 Through 31 for ADC Conversion Is Not Supported in PDL 2.1.0 - KBA218805

    Version: **   Question: Selecting analog input channels 8 through 15, and 24 through 31 for ADC conversion is not supported due to a defect in the ADC driver. The problem is reproducible on FM0+ and FM4 family o...
    content.librarian
    last modified by content.librarian