Hi

I am making a connection to 2 different phones at the same time and trying to setup 2 simultaneous SCO links using HFP. For this to work I need at least one of the connections to route through the APP, I can see that it can be done by using:

wiced_bt_dev_status_t voice_patch_status =  wiced_bt_sco_setup_voice_path(&hfp_client_voice_path_setup);

WICED_BT_TRACE("Voice path setup status: %d\n\r", voice_patch_status);

I have inserted it right after:

result = wiced_bt_hfp_hf_init(&config, hfp_client_event_callback);

In the init of hfp.

And the rest is:

void hfp_client_sco_data(uint32_t ltch_len, uint8_t *p_data)

{}

static wiced_bt_voice_path_setup_t hfp_client_voice_path_setup =

{

              .path = WICED_BT_SCO_OVER_APP_CB,

              .p_sco_data_cb = &hfp_client_sco_data

};

I get status 0 Success but when I make the connection, I get a BTM_SCO_DISCONNECTED_EVT after BTM_SCO_CONNECTION_REQUEST_EVT instead of a BTM_SCO_CONNECTED_EVT.

I have also tried it in the Audio_Headset_and_Speaker example, there uses the bt_hs_spk_lib component, so here I have done it by:

bt_hs_spk_set_audio_sink(AM_UART);

And then the component should do the rest but same result, a disconnect.

I have been looking around but can’t find what I am doing wrong, do I need to include or setup something more to get it to work?

Is there an example project that uses wiced_bt_sco_setup_voice_path to APP?

Is there an example project their setup multiple SCO connections?

I use:

• CYW920721B2EVK-02
• Eclipse with ModusToolBox v2.2.0
• Bluetooth SDK version 2.8.0
• A headset with microphone

/Jacob

I made a custom board consisting of a CYPD3125 controller.

The board shall be the preferred power supply to a tablet connected via USB type-c. In case the boards external supply is down the tablet shall power the board. So the board with the CYPD3125 must be either source or sink.

The firmware is based on the notebook project that has already all main functions.

Now the problem is that the producer FET is never turned on. I only measure ~150mV.

Does anyone have an idea?!

Please find the attached screenshot of the schematic.

Hi there,

I have a question regarding the code checksum on a PSoC5LP part (specifically CY8C5667AXI-LP040).

I have a request on a project to provide the checksum of code over a serial interface.  Is there a known good way during runtime to either read or calculate the checksum of the entire codespace of the PSoC?  Perhaps even an API function I'm not aware of?

Thanks for the help!

Hello everyone,

i need a clarification on a detail regarding VCCIO=1V8 of CY7C65213.

As seen on the datasheet, the VCCD pin is the OUTPUT of the internal regulator for 1V8 and it cannot drive external loads.

Additionaly, on the datasheet  it is mentioned that when VCCIO is less than 2V, VCCD must be connected to VCCIO.

In this scenario, can the device be damaged during startup considering that the default configuration stored in its Flash doesn't disable the internal regulator (as shown on Table 2 in the datasheet)?

Lastly, always from Table 2 of the datasheet, it is hinted that CTS and DSR signals have an internal pull up. What about DCD and RI Signals? Do they have some internal pull up or pull down as well?

Thanks in advance.

Hi All,

I am creating a new design variant of a working project targeted for the 222014-01 BLE module by copying a working project that was targeted for the 222005 module, changing its name and using Device Selector to choose the new module type.

After doing this, I get three errors during the fitting stage:

To make matters worse, I've seen this error before but I cannot remember how I fixed it.  I have tried updating the components (BLE was updated to 3.66 and cy_boot to 5.90), but this hasn't eliminated the errors.

The error message suggests how to fix the problem but I can't find where one sets the "User provided" option.

Thanks,

Scott

Hello,

I am trying to include the 'CyAPI.lib' from the x64 Cypress library folder and trying to build in C++ 10.4 Builder for the multi target platform. But, I am facing problem with a linker error like "[ilink64 Error] Error: Unresolved external 'CCyUSBDevice::CCyUSBDevice(void*, _GUID, int)..................'  while trying to build. Please find the attached snapshot for more details. 

Any guidance on the matter would be greatly appreciated !!  

@YatheeshD_36 

Thanks,

Aditya

hello,

i've succesfully tried and reproduced the example called "qspi_read_write_using_sfdp".

When i'm importing the rights function in my project, the init function fails (cy_serial_flash_qspi_init).

When i'm digging into the details, it fails when calling Cy_SMIF_MemInit which return CY_SMIF_SFDP_SS0_FAILED

i've compared everything, and i'm not able to find what i'm doing wrong.

is there anybody who experienced the same issue ? thanks

Traveo II CYT4B can run on 350MHZ?      code is as follow:

#if (CY_SYS_PLL400M_0_FREQ == CY_SYS_PLL400M_0_350MHz)
// PLL_OUT = 24,000,000(Feco) / 3 * 125 / 5 = 200,000,000Hz
// Restriction: 400,000,000 <= Fvco <= 800,000,000
// This time, Fvco = 16,000,000 * 175 / 4 = 700,000,000.

#define CY_SYSTEM_PLL0_CONFIG_REFDIV (2UL)
#define CY_SYSTEM_PLL0_CONFIG_FEEDBACKDIV (175UL)
#define CY_SYSTEM_PLL0_CONFIG_OUTDIV (6UL)

/*
#define CY_SYSTEM_PLL0_CONFIG_REFDIV (3UL)
#define CY_SYSTEM_PLL0_CONFIG_FEEDBACKDIV (125UL)
#define CY_SYSTEM_PLL0_CONFIG_OUTDIV (5UL)
*/
#elif (CY_SYS_PLL400M_0_FREQ == CY_SYS_PLL400M_0_320MHz)

Dear Sirs and Madams,

The item "Table 3. External Clock Input Requirements" is defined in AN72332, where "Rise time / fall time 3 [ns] (Max)" is specified. 

Please tell us this voltage condition. (For example, 20% -80% VCC, not specified, etc.)

AN72332

https://www.cypress.com/file/122726/download

Regards,