Hi every body. I want to run an TCP/IP ethernet with ENC28J60 and CYC4245AXI-483

is there any body that have an example to share with me?

any samples that I founded is about psoc3, when I changed chip selection from psoc3 to psoc4 several errors occur. It is cause to confuse me to run and understand.

As a basic view point I need to understand how does ENC28J60 with their registers to have an TCP/IP ethernet network building. In addition what can I do to manage control and buffer registers of ENC28J60 as well as to work well.

please guide me...

thanks for attention...

Hello,

In order to work on a project  was developed using PSoC Creator version 4.0, I went to the archive link (https://www.cypress.com/documentation/software-and-drivers/psoc-creator-software-archive)  and tried to down load version 4.0 (https://www.cypress.com/file/318611/download).. Despite trying from multiple computers and trying it a few times  (I am registered and logged into the website), I can not download the executable.. Clicking on the link does nothing and doesn't show any errors either.. I tried links listed there for other versions as well and none of them downloaded.

Can you please suggest how can I get access to the Creator 4.0 installation files ? 

thanks and best regards
sheshu

I tried to implement the hibernate example from this project on my board and it gets stuck in hibernate mode.  So I took out the CY8CKIT-059 and modified my code example a bit to fit this board and it still gets stuck in hibernate mode, well sort of. I think it is accepting the GPIO interrupt partially since the current draw increases after the button press, but it does not execute any of the code after the CyPmHibernate(); CyPmRestoreClocks();.   The code is slightly modified from the by example by blinking the LED so I can see where in the code we are without debugging.  I have attached the project. 

The CE95346 - Power Management and Hibernate with PSoC 3/5LP  example does work maybe because of the custom ISR?

Any Ideas? (could I have some system setting wrong?) I haven't found any note to a similar problem.

Here is the Hibernate section of the code:

case HIBERNATE : /* 0x41 - Hibernate - PICU */
{
/* Display mode and set LCD pins for low-power. */
LCD_Position(1,0);
LCD_PrintString("Hibernate ");
LED_S_Write(LED_OFF);
/* Start the button interrupt. */
isr_ButtonPress_Start();
SleepComponents();

LED_S_Write(LED_OFF);
CyDelay(1000u);
LED_S_Write(LED_ON); //blink the LED so I know where I am in the code
CyDelay(1000u);
LED_S_Write(LED_OFF);
CyDelay(1000u);
LED_S_Write(LED_ON);
CyDelay(1000u);
LED_S_Write(LED_OFF);

/* Save clocks and enter low power. */
CyPmSaveClocks();
CyPmHibernate();

/* The PSoC wakes up here. Restore everything and clear PICU interrupt. */
CyPmRestoreClocks();

LED_S_Write(LED_ON); //Status LEDs so I know where I am in the code
CyDelay(1000u);
LED_S_Write(LED_OFF);
CyDelay(1000u);
LED_S_Write(LED_ON);

WakeComponents();
/* Stop the button interrupt. */
isr_ButtonPress_Stop();
Button_ClearInterrupt();

break;
}

Hi

Recently, we working on a project, it need to communicate with OCT camera and FPGA by using USB3.0.

The problem is the OCT camera can't support UVS protocol, it is using a driver making by themselves.(The driver can work on the JETSONTX2 arm64 device, OS is Linux)

When I reviewed the EZ-USB FX3 user manual, the FX3 has ARM and it can working on Linux.

Can EZ-USB FX3 install the extra diver or I need build other driver by myself ?

Or does the EZ-USB FX3 have only USB PHY mode?

Looking forward to your reply, I will appreciate that.

Oh, wise FX3 masters this humble supplicant seeks your wisdom concerning Host, FX3 and FPGA interfacing. 

I'm investigating the use of an FX3 device for interfacing an FPGA to a host system via USB Gen 3.1.   I need to create a composite USB device with the following sub-devices:

1.  A 50 MB/s bidirectional stream.   Only inbound or outbound transfers will be active at a time but not both simultaneously.  The data must be transferred isochronously.

2. 1.2 MB/s bidirectional stream that must enumerate to the host as a USB audio device.  No need to produce I2S nor consume data supplied over I2S.  Outbound or inbound "Audio" (it isn't) data can simply be written as a stream of 16 bit samples onto the GPIF II bus.  Why fake an audio device?  To re-use existing software. The  exact reasons are both proprietary and far too arcane (boring even) to discuss.  The data must be transferred isochronously.

3. A register interface used for configuration, control and status  that will be sporadically accessed.  There should be an "interrupt" associated with this interface.  Transfer rates are unknown but believed to be well below 100KB/s.Perhaps,  USB  interrupt transfers are appropriate

I would like to use a synchronous ADMux interface on the GPIF II bus (perhaps, this is a dumb idea) that is 16 bits wide connected to the FPGA.  There seems to be a 2 bit address that associated with each stream.  Logic in the FPGA will use the two address bits to disambiguate among the high speed stream, the low speed stream and the register access stream.

Questions:

1.  Can the FX3 be operated this way?  Although 32 endpoints are available, I'm not sure that FX3 can actual support composite devices.

2. Is there a version of CyAPI for Linux?  Anyone have experience using CyAPI with Ubuntu 18.04? I don't want to write a Linux kernel driver, if it can be avoided.

3. Is it possible to enumerate as an USB audio device but send the data over the GPIF II bus?

Due to my ignorance, I can't see the forest for the trees.  As is typical, Cypress provides good documentation but I'm overwhelmed with the amount info that must be absorbed to really understand The FX3.

Thanks for entertaining a bunch of "durn fool" questions.  Your help is much appreciated!

Wayne

Hi All,

Merry Christmas and happy holidays.  My professional development project has hit a block.

Purchased a CY8CKIT-064S0S2-4343W kit and am working with ModusToolbox v2.2.0. 

I have hit an issue when trying to provision the device.  I get the following error when I try to do the provisioning as spelt out in the the Provisioning Guide documentation.

Everything seems to be ok but it fails with this error message

"

2020-12-29 14:24:59,073 : C : ERROR : Early Production Units detected, please get earlier version of tools by running 'pip install --upgrade --force-reinstall cysecuretools==2.1.0'. Check the log for details

Error: Failed processing! "

This error is also returned if I try and run the entrance-exam command.

Based on the responses, I am sure that the hardware is communicating with my pc.  I can't actually run the earlier version of cysecuretools as when I try that, I get a stack of python errors about being unable to build the wheel for cryptography which use PEP 517 and cannot be installed directly. 

So I would like to get things working with all the current versions of ModusToolbox etc.    Please help, it seems to be a pretty pathetic way to be failing as I am just trying to get the demo code to work at this stage 😞

Here is the response to entrance-exam. 

"

I:\Foundry\Project\S1000072_AWS\FreeRTOS\vendors\cypress\MTB\psoc6\psoc64tfm\security>cysecuretools -t cy8ckit-064s0s2-4343w entrance-exam

2020-12-29 14:24:58,260 : C : INFO  : Target: cy8ckit-064s0s2-4343w

2020-12-29 14:24:58,292 : P : INFO  : Target type is cy8c64xa_cm4_full_flash

2020-12-29 14:24:58,306 : P : INFO  : DP IDR = 0x6ba02477 (v2 rev6)

2020-12-29 14:24:58,308 : P : INFO  : AHB-AP#0 IDR = 0x84770001 (AHB-AP var0 rev8)

2020-12-29 14:24:58,312 : P : INFO  : AHB-AP#2 IDR = 0x24770011 (AHB-AP var1 rev2)

2020-12-29 14:24:58,318 : P : INFO  : AHB-AP#0 Class 0x1 ROM table #0 @ 0xf1000000 (designer=034 part=102)

2020-12-29 14:24:58,322 : P : INFO  : AHB-AP#2 Class 0x1 ROM table #0 @ 0xe00ff000 (designer=034 part=102)

2020-12-29 14:24:58,329 : P : INFO  : [0]<e0080000:CTI class="9" designer=43b part=906 devtype=14 archid=0000 devid=40800:0:0>

2020-12-29 14:24:58,331 : P : INFO  : [3]<e008e000:TPIU-M3 class="9" designer=43b part=923 devtype=11 archid=0000 devid=ca1:0:0>

2020-12-29 14:24:58,341 : P : INFO  : [4]<e007f000:ROM class="1" designer=034 part=102>

2020-12-29 14:24:58,342 : P : INFO  :   AHB-AP#2 Class 0x1 ROM table #1 @ 0xe007f000 (designer=034 part=102)

2020-12-29 14:24:58,356 : P : INFO  :   [0]<e000e000:SCS-M4 class="14" designer=43b part=00c>

2020-12-29 14:24:58,358 : P : INFO  :   [1]<e0001000:DWT class="14" designer=43b part=002>

2020-12-29 14:24:58,369 : P : INFO  :   [2]<e0002000:FPB class="14" designer=43b part=003>

2020-12-29 14:24:58,371 : P : INFO  :   [3]<e0000000:ITM class="14" designer=43b part=001>

2020-12-29 14:24:58,380 : P : INFO  :   [4]<e0042000:CTI class="9" designer=43b part=906 devtype=14 archid=0000 devid=40800:0:0>

2020-12-29 14:24:58,382 : P : INFO  :   [5]<e0041000:ETM-M4 class="9" designer=43b part=925 devtype=13 archid=0000 devid=0:0:0>

2020-12-29 14:24:58,393 : P : INFO  : CPU core #1 is Cortex-M4 r0p1

2020-12-29 14:24:58,396 : P : INFO  : FPU present: FPv4-SP

2020-12-29 14:24:58,409 : P : INFO  : 4 hardware watchpoints

2020-12-29 14:24:58,410 : P : INFO  : 6 hardware breakpoints, 4 literal comparators

2020-12-29 14:24:58,423 : C : INFO  : Use system AP

2020-12-29 14:24:58,428 : P : INFO  : Clearing TEST_MODE bit...

2020-12-29 14:24:58,434 : C : INFO  : Probe ID: 19111301a419041100a4190400000000000000002e127069

2020-12-29 14:24:58,435 : C : INFO  : Secure Flash Boot version: 4.0.1.1089

2020-12-29 14:24:58,862 : C : INFO  : Device CyBootloader version: unknown

2020-12-29 14:24:58,863 : C : INFO  : Package CyBootloader version: 2.0.0.3345

2020-12-29 14:24:59,067 : C : INFO  : Chip protection state: Secure

2020-12-29 14:24:59,073 : C : ERROR : Early Production Units detected, please get earlier version of tools by running 'pip install --upgrade --force-reinstall cysecuretools==2.1.0'. Check the log for details

Error: Failed processing!

"

The response when attempting to provision is similar.

"

I:\Foundry\Project\S1000072_AWS\FreeRTOS\vendors\cypress\MTB\psoc6\psoc64tfm\security>cysecuretools --policy ./policy/policy_multi_CM0_CM4_tfm.json --target CY8CKIT-064S0S2-4343W provision-device

2020-12-29 14:22:50,975 : C : INFO  : ######################################################################

2020-12-29 14:22:50,975 : C : INFO  : Provisioning packet is created

2020-12-29 14:22:50,976 : C : INFO  : ######################################################################

..... "

The rest of the provisioning response is the same as for the entrance-exam.

Thanks in advance for any help.  Cheers!

Peter

Hi

How can I create UART ISR to respond to data received using high-level api ?

in low-level, I would write the isr and include for example:

if((UART_HW->INTR_RX_MASKED & SCB_INTR_RX_MASKED_NOT_EMPTY_Msk ) != 0)

{..... }

How can do the same using high-level api ?

Hello to all,

We were using BLE v3.30 and PSoc4 and OTA upgradable stack option for the FW update. Everything was working fine.

Then we updated the BLE to the v3.66 and now it seems we have problems to do a pairing as we cant enter the PIN number.

We are using mode 1, authentication with encryption, bonding and encryption key size 16.

The strangest thing is also, that everything seems to work fine when we are in app mode, but when we switch to the bootloader mode we are facing some problems. Pairing is working fine in the Android 10, 5.1, 8 and IoS 13.7. But is not working in the Android 9 and IoS 14.x when we are in the bootloader mode. I have checked and we are using the same settings in app and in bootloader mode, also as we are using the shared BLE stack the code is the same. Strangest thing is also that even if I could not enter PIN I can see GATT services, but when I try to do some read/write operation I get error that I have insufficient authentication rights.

As I see after the event CYBLE_EVT_GAP_DEVICE_CONNECTED, some phones don't send the  event CYBLE_EVT_GAP_SMP_NEGOTIATED_AUTH_INFO and I cant enter PIN code, so the authentication is not completed. And as I found CYBLE_EVT_GAP_AUTH_FAILED fails with: CYBLE_GAP_AUTH_ERROR_AUTHENTICATION_REQ_NOT_MET.

ADDED short UPDATE:

- I have tried to connect multiple times and sometimes I could enter the PIN number. Are there maybe any timing issues that I should be aware of?

The main loop in the file main.c is:

 for(;;)
{
CyBle_ProcessEvents();
Loader_HostLink(5u);

/* To have predictable timeout */
CyDelay(5u);
}

I am still trying to understand where is the problem. Also tried on the phone to clear the Bluetooth system cache, tried restarting the phone, unpairing all the devices, but nothing helped.

Does anyone knows what could be the problem? What is do different when we are in the app mode and when we are in the bootloader mode that could influent BLE authentication?

Thanks for the answer, Frenk

Hello, 

I am using a PSoC6 to interact with a serial flash, and I have encountered a bus fault using the library. The fault happens in the Cy_SMIF_TransmitCommand() function.

Here is some screenshots for the fault and the system clock configure.

I would like to know how to fix this issue? What was the cause of this issue?

Let me know if you need more information.

Thanks,

Xiang Gao