Hi,

I'm looking for reference code to run MIPI interface of the AR0144 Demo 3 Head board with FX3.

Will appreciate any assistance.

Thanks,

Itay Cohen

To whom it may concerned ,

a CCG2 is emplyed on our USB4 Gen3 cable product which undergoes the compliance test w/ 3 items failed — 

1)Ra is out of 800 Ohm ~ 1.2K Ohm ( 3 pcs  tested and 1/3 ok w/ Vconn @423 mV ,and 2 out of 3 NG w/ Vconn = 402 mV )

2) PD3 modes - checking SVIDs ( The UUT shall return a number of SVIDs in between 1 and 1, actual 2 (TEST.PD.VDM.CBL.1#3)

3)Checking Headers (Message ID 0): Manufacturer String shall be null terminated (COMMON.CHECK.PD.10#1 x 1)

Kindly advise the countermeasure of the above 3 issues.

f.y.i. 1）NG test report 2）SVID on VIF 3）SVIDs setting on CCG2 are on the attached photos。

Thank you and best Regards,

Alan Huang 

在PSoC Creator4.4环境中添加一个SCB模块，配置成SPI模式；

在Basic配置栏里，其Band rate配置项只有固定集中速率，查看SPI_1 datasheet，里面也没有提供对应的SPI 波特率修改设置方法；

请问，是否有基于寄存器或其他API接口的方式，在应用代码中修改SPI 速率？

期待您的答复~~~

Hi,

I have a workspace that has 2 "Design projects" and one "Library project".

The "Library project" is that one that contains the shared code. And from I'd like to call `CySysTickStart()` from it.

That functioned is declared in "CyLib.h", but I cannot include it from my "Library Project".

Question: How do I include CyLib.h (or for the matter, any other Cy* file  / cmsys* file) from a Library Project?

(Note: Those files seems that they get auto-generated by the "Design Project").

Hi. Over the past couple days I’ve been suffering from an issue where my PSOC creator crashes within seconds of typing code.

Upon further investigation, windows event viewer said it was Libclang.dll and the internet said that I could disable semantic parsing to stop the crashing.

that worked except now I might as well be using notepad to code. This is a recent issue. Is there any way to fix this?

Hello

I am programming a function to wake up with the wakeup key after entering PSoC6 deep sleep mode.

Below is the function source.

void gotoDeepSleep(void)
{
cy_stc_ble_gap_disconnect_info_t info;
cy_en_ble_api_result_t apiResult;

Cy_GPIO_Clr(M4_TRIGGER_0_PORT, M4_TRIGGER_0_NUM);
Cy_SysLib_Delay(500);

Cy_GPIO_Write(STATUS_LED_0_PORT, STATUS_LED_0_NUM, DISABLE_H);
Cy_SysDisableCM4();
Cy_SCB_SPI_Disable(SPI_AFE_HW, NULL);
UART_DEBUG_PutString(": STOP_M4\r\n");

if(Cy_BLE_GetConnectionState(appConnHandle) == CY_BLE_CONN_STATE_CONNECTED) {
info.reason = CY_BLE_HCI_ERROR_OTHER_END_TERMINATED_USER;
info.bdHandle = appConnHandle.bdHandle;

do {
apiResult = Cy_BLE_GAP_Disconnect(&info);
Cy_SysLib_Delay(100);
Cy_BLE_ProcessEvents();
} while(apiResult != CY_BLE_SUCCESS);

UART_DEBUG_PutString(": Cy_BLE_GAP_Disconnect()\r\n");
}

do {
apiResult = Cy_BLE_Stop();
Cy_SysLib_Delay(100);
Cy_BLE_ProcessEvents();
} while(apiResult != CY_BLE_SUCCESS);

UART_DEBUG_PutString(": Cy_BLE_Stop()\r\n");


UART_DEBUG_PutString(": Enter deep sleep\r\n");
Cy_SysLib_Delay(1500);

UART_DEBUG_Disable();
stop_WDT();

// Enable GPIO wake-up interrupt assigned to CM0+
Cy_SysInt_Init(&SYSTEM_IRQ_cfg, handling_SYSTEM_IRQ);
NVIC_ClearPendingIRQ(SYSTEM_IRQ_cfg.intrSrc);
NVIC_EnableIRQ(SYSTEM_IRQ_cfg.intrSrc);
Cy_SysLib_Delay(100);

// Enter deep sleep mode
Cy_SysPm_DeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT);
NVIC_SystemReset();
}

The sequence of actions is as follows.

1. If pairing is in progress, use the Cy_BLE_GAP_Disconnect() function to disconnect.
2. Turn off BLE.
3. Turn off the UART and watchdog.
4. Register the key as a wake-up interrupt.
5. Enter Cy_SysPm_DeepSleep() mode.
6. When the key is pressed, it wakes up and resets by executing the NVIC_SystemReset() function.

When I run this function, It works fine while advertising.
But if this function is executed in pairing state (when the Cy_BLE_GAP_Disconnect() function is executed), it does not wake up after entering deep sleep mode.
Why? Please reply.

thank you.

Hi,

I am using the CY8C4124LQI-413 with capsense and I feel like the VSSD pin is in the way of my capsense IOs:

The only component that needs to be connected to VSSD is the capacitor connected to VCCD (V of the internal reg). would it be viable to connect that capacitor directly to the star ground configuration recommended for Capsense use, and leave the actual VSSD pin disconnected on the PSoC? (I am not sure if some functionalities may be compromised by doing so)

otherwise, I would have connected VSSD to the E-pad, but capsense recommends connecting the Epad to VSSA...

Thanks!

Hi,

we use the following flash chip in our product: CYPRESS, S25FL128SAGMFI001.

Unfortunately, several chips failed after a while. Our host system is not able to read the Manufacturer Signature (Command READ_ID (REMS)). The failure affects 10 out of 100 devices.  When could this condition occur?

What happens when the maximum number of write/erase cycles to a fix memory address of a 4K sector is reached? 

Does the Flash module organize itself internally and does it have a kind of mapping?

If a 4K sector is no longer writable, should it still be possible to read out the manufacturer signature?

Could you help me with the question?

Thanks and looking forward to your reply.