Hello, 

I am using a PSoC6 to interact with a serial flash, and I have encountered a bus fault using the library. The fault happens in the Cy_SMIF_TransmitCommand() function.

Here is some screenshots for the fault and the system clock configure.

I would like to know how to fix this issue? What was the cause of this issue?

Let me know if you need more information.

Thanks,

Xiang Gao

Hello,

There is a big chance from ModusToolBox v1 to 2.2, where the project configuration is very different. 

One thing I am struggling with is how to define a macro in the project configuration, there is a dedicated section in the V1.1. 

I have tried Preprocessor Include Paths, Maros etc.. section in the project properties, I have used the CDT User Setting Entries, but it doesn't work.

-Xiang

I have a bootloader where I set the bootloader version parameter to 0xabcd. I enter the bootloader using the bootloader command and then I check the meta data using the get metadata command, I get the right bootloader version 0xabcd. I then flash the chip with a new bootloadable using the bootloader and I reset the chip. After the chip resets, it enter the bootloader and doesn't exit until I send it a command. However when I send it enter bootloader using the bootloader command and then I check the meta data using the get metadata command, I get the wrong bootloader version. Is this expected behavior or am I missing something?

I would like to create a bootloader bootloadable combination that I could flash without the PSoC programmer, so I want to be able to flash the bootloader and the bootloadable without the programmer. Is the Combination Project my best bet? Can I do a combinations project where the bootloadables  are not splitting the memory? Or is there a different way to do this like the In-Application Bootloader?

Howdy, 

I'm a mechanical engineer... graduated nearly 10 years ago now... I need to be able to control things and need to build up an entirely new skill set.  I was turned on to Psoc because a vendor that designs controllers for my job suggested I start here. 

I know it's a lofty goal but I need to learn how to control ICE engines. I'm not an automotive company, just a guy trying to figure out a very serious hobby that will increase my capabilities.  I've seen some pretty cool things being done with raspberry pi but for my end application I need something a little more professional. 

Where do I start? What software do I use, what programming language do I learn... seriously I know what I'm asking is border line nuts but hey... gotta start somewhere.  

I don't want to do anything spectacular, infact the simpler it is the better. I've talked to all of the big aftermarket/race ECU companies and none of them do what I need so here I am. 

Oh, wise FX3 masters this humble supplicant seeks your wisdom concerning Host, FX3 and FPGA interfacing. 

I'm investigating the use of an FX3 device for interfacing an FPGA to a host system via USB Gen 3.1.   I need to create a composite USB device with the following sub-devices:

1.  A 50 MB/s bidirectional stream.   Only inbound or outbound transfers will be active at a time but not both simultaneously.  The data must be transferred isochronously.

2. 1.2 MB/s bidirectional stream that must enumerate to the host as a USB audio device.  No need to produce I2S nor consume data supplied over I2S.  Outbound or inbound "Audio" (it isn't) data can simply be written as a stream of 16 bit samples onto the GPIF II bus.  Why fake an audio device?  To re-use existing software. The  exact reasons are both proprietary and far too arcane (boring even) to discuss.  The data must be transferred isochronously.

3. A register interface used for configuration, control and status  that will be sporadically accessed.  There should be an "interrupt" associated with this interface.  Transfer rates are unknown but believed to be well below 100KB/s.Perhaps,  USB  interrupt transfers are appropriate

I would like to use a synchronous ADMux interface on the GPIF II bus (perhaps, this is a dumb idea) that is 16 bits wide connected to the FPGA.  There seems to be a 2 bit address that associated with each stream.  Logic in the FPGA will use the two address bits to disambiguate among the high speed stream, the low speed stream and the register access stream.

Questions:

1.  Can the FX3 be operated this way?  Although 32 endpoints are available, I'm not sure that FX3 can actual support composite devices.

2. Is there a version of CyAPI for Linux?  Anyone have experience using CyAPI with Ubuntu 18.04? I don't want to write a Linux kernel driver, if it can be avoided.

3. Is it possible to enumerate as an USB audio device but send the data over the GPIF II bus?

Due to my ignorance, I can't see the forest for the trees.  As is typical, Cypress provides good documentation but I'm overwhelmed with the amount info that must be absorbed to really understand The FX3.

Thanks for entertaining a bunch of "durn fool" questions.  Your help is much appreciated!

Wayne

I am working on a Flash Write routine which is part of a boot loader for the CY8C27243.  I am using Application AN2100 as a starting point. I have all aspects of the bootloader working except for Flash Write.  After many days of debugging I have narrowed it down to the Supervisor ROM Flash Write sequence which uses the M8C SSC instruction. 

Here is a simplified sequence used to access a supervisor ROM routine as found in FLASHAPI.asm which is part of AN2100. This is part of the temperature table access routine and is a very simple use of the supervisor ROM and should work.

push A   ; save the State variable
push X
mov X, SP   ; copy SP into X
mov A, X     ; mov to A
add A, 3     ; create 3 byte stack frame
mov [0xF9], A   ; save stack frame for supervisory code
mov [0xF8], 0x3A   ; load the supervisory code for flash operations
mov A, 6    ; load A with FLASH_TEMP_TABLE_LOOKUP rom code
SSC          ; SSC call the supervisory code
pop X

Code execution does not return after the SSC instruction. I am assuming it is halting for some reason.

I have double checked all of the parameters and can't figure out what I am doing wrong.  Can SSC only be called when the M8C is in a certain mode ?  I have been able to read Flash successfully since that routine uses the absolute ROM read instruction ROMX which avoids an SCC. I wish there was such an easy way to do a write.

I have been working on this bootloader for nearly a month now and need to finish this before new product release.  

Hi Tech,

Per customer's request, could you help check and share with us PDN ( product discontinued notice ) for EOL part#CY7C4285V-15ASI? What's the alternative part?

Thanks.

 I tried creating a project for the CY8C6245 processor on PSOC Creator 4.4.

  It is not in the list of allowable processors.  The PSOC 62 processor version  246 and 247 parts are there, but not the 245.

  What can I download to support the CY8C6245 on PSOC Creator?