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MaPf_1293106
PSoC Creator & Designer Software
The CAN receive call back for basic mailboxes doesn't tell the related mailbox.I can add my own code to fix the problem but wouldn't it make sense to ... Show More
zvivered
PSoC 5, 3 & 1 MCU
Hello, My host is connected to a PSOC that contains a USBUART.  Upon PSOC boot completion, the PC has a new COM23.  On the PSOC side I used the follow... Show More
Sri_Cbe
Community Translations
I am getting the error as in the image attached,using Miniprog4 for flashing(CYT2B98CA) it not sure why i am getting this error,It will be great if a... Show More
Ronny
PSoC 5, 3 & 1 MCU
Dear All: There is a I2C mater and several slaves with the same address so I need a mux to determine which slave device i want to control. And i use a... Show More
Jweaver
PSoC 6 MCU
I think the device with the most UDB's has the most resources for implementing verilog-  would that be Psoc 5LP ?   It seems Psoc 6 devices don't use ... Show More
yuejin
Traveo II
Hi! I have a  problem。 In M4 Core ,I use Cy_Flash_BlankCheck to check the address,the function return CY_FLASH_DRV_FLASH_NOT_ERASED。But I read the add... Show More
NXTY_Nagata
USB Superspeed Peripherals
Hi, I have two questions about fx3. Q1: When the CPU is done by software CPU resets(not whole device reset) , are the status of all I/O pins retained?... Show More
JiSi_2146306
PSoC 4 MCU
Hi,  I am referring to the below examples to test BLE Bonding between two pioneer kits. https://github.com/Infineon/PSoC-4-BLE/blob/master/100_Projects_in_100_Days/Day015_Bonding/BLE_Bonding.pdf... Show More
anhnhancao
ModusToolbox Bluetooth SDK
Dear all, I already own a CYW20706B2 Evaluation KIT. I want to connect it to an Audio codec and use the share-clock feature on CYW20706(GPIO BT_CLK_RE... Show More
KW
Nor Flash
Datasheet Rev L, In table 8 the size of CFI data and the byte address range are not consistent. Range 00020h~000CEh (Here is also a typo in the table)... Show More

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