I am looking through the datasheet and website information regarding the technology used in P/N S25FL064LABNFI011, but not able to find anything. Can you please advise, is this part CMOS, Bipolar, BiCMOS, or other?

Hi All.

Our customer going to make Audio device through CYBT-343026-01.
Can i embody A2DP in the Non-OS through CYBT-343026-01?
And Can distribute with Firmware form possible?

Please check this question.

Thank you.

Hi, What is the absolute max junction temperature and max recommended operating junction temperature of S29GL512S10TFI02 (industrial) and S29GL512S10TFV02 (industrial plus)?  Both are TSOP-56 package.  The datasheet gives max Ta  (ambient operating temperature) but does not give max rated junction temperature Tj.  Thanks,

Good morning,

how you can see on attached file, I would to pilot 10 7-segment displays with LED_Driver block.

I can't use a second LED_Driver because the 7-segment are commons and Creator give me an error.

Is there a way to use LED_Driver block with 10 commons?

Thanks for all your helps.
Mattia Scricciolo

Hi

I am using PSoC-6 as SPI slave to send data to master (PC).

Description of Cy_SCB_SPI_WriteArrayBlocking() says: When in the slave mode, writing data into the TX FIFO does not start an SPI transfer. The data is loaded in the TX FIFO and will be sent to the master on its request.

Does the PSoC slave SPI sends data once it receives the clock from the bus master ? or does it respond when the master asserts the slave_select ?

thanks

We are using CY_BLE_EVT_GAP_DEVICE_DISCONNECTED to know if the peripheral got disconnected. On CY_BLE_EVT_GAP_DEVICE_DISCONNECTED we perform connection cleanup, but we noticed on one time the peripheral disconnected but it seems like we missed or didn't get CY_BLE_EVT_GAP_DEVICE_DISCONNECTED.

Is it expected not to get CY_BLE_EVT_GAP_DEVICE_DISCONNECTED event when device disconnect? Is there way to manually check if BLE stack properly disconnected?

Hi,

I worked through the UVC example and got video streaming working.  I then worked through the GpifToUsb example and got data read out working.  Now I am trying to merge them and continuously read out data from an ADC without dropping data.  To do this, I began with the GpifToUsb example and added a simple GPIF project with two threads (0,1):

Next, I added a MANY_TO_ONE auto DMA channel to GpifToUsb:

    //try creating a many to one dma channel
    CyU3PDmaMultiChannelConfig_t dmaMultiConfig;
    CyU3PMemSet ((uint8_t *)&dmaCfg, 0, sizeof (dmaMultiConfig));
    dmaMultiConfig.size           = CY_FX_DMA_BUF_SIZE;
      dmaMultiConfig.count          = CY_FX_DMA_BUF_COUNT;
      dmaMultiConfig.validSckCount  = 2;
      dmaMultiConfig.prodSckId [0]  = (CyU3PDmaSocketId_t)CY_U3P_PIB_SOCKET_0;
      dmaMultiConfig.prodSckId [1]  = (CyU3PDmaSocketId_t)CY_U3P_PIB_SOCKET_1;
      dmaMultiConfig.consSckId [0]  = (CyU3PDmaSocketId_t)(CY_U3P_UIB_SOCKET_CONS_0);
      dmaMultiConfig.prodAvailCount = 0;
      dmaMultiConfig.prodHeader     = 0;                 /* 12 byte UVC header to be added. */
      dmaMultiConfig.prodFooter     = 0;                  /* 4 byte footer to compensate for the 12 byte header. */
      dmaMultiConfig.consHeader     = 0;
      dmaMultiConfig.dmaMode        = CY_U3P_DMA_MODE_BYTE;
      dmaMultiConfig.cb 			= NULL;
      dmaMultiConfig.notification   = 0;
      //dmaMultiConfig.notification   = CY_U3P_DMA_CB_CONS_SUSP; // CY_U3P_DMA_CB_PROD_EVENT | CY_U3P_DMA_CB_CONS_EVENT;
      //dmaMultiConfig.cb             = GpifToUsbDmaCallbackMulti;
     
      	  apiRetStatus = CyU3PDmaMultiChannelCreate (&glDmaChHandleMulti, CY_U3P_DMA_TYPE_AUTO_MANY_TO_ONE,
              &dmaMultiConfig);
      if (apiRetStatus != CY_U3P_SUCCESS)
      {
          /* Error handling */
          CyU3PDebugPrint (4, "DMA Channel Creation Failed, Error Code = %d\n", apiRetStatus);
          CyFxAppErrorHandler (apiRetStatus);
      }

The result is:

USB event: 11 0
About to connect to USB host
USB event: 0 1
CY_U3P_USB_EVENT_CONNECT detected
CyFxApplnInit complete
USB event: 8 0
USB event: 5 1
setting up dma
              DMA Channel Creation Failed, Error Code = 64

Any idea what I'm doing wrong?  

Hello, I am currently developing a USB PD power bank that utilizes bi-directional 60W input and 100W output. My plan is to use SC8815 I2C bidirectional buck-boost controller for Power and CYPD 3171 as the PD controller. I want to use CYPD3171 to control SC8815 over I2C to configure SC8815 modes(input and output) as well as output and charging voltage, etc. I also want CYPD3175 to inform the main MCU of PD modes, voltages, currents etc. My question is that what is the best way to achieve this functionality? Should I use EZ-PD config utility or PSOC programmer to write the code? Also, how should I upload the program onto CYPD3175, can I use an ST-Link, or use another MCU over I2C? Can someone recommend me a software and programmer combo? I saw this reference design using sc8915 which is extremely similar to my application, and I think I am going to reference the schematic, but I don't see where the code is located, could someone also inform me of where it is located so I can use it as a reference if possible? I am new to the CCG3 ecosystem, thank you very much!

I want to use several 8Mbit x8 SPI 40MHz Excelon LP F-RAM devices in an application where I need to convert signals coming from a parallel x8 SRAM interface to 40MHz SPI signals and also 40MHz SPI signals sourced from the SPI F-RAM device to signals destined for the x8 parallel SRAM interface. As for the x8 parallel SRAM interface timings, conservatively, I have a memory address setup time of around 250ns, a memory address hold time of around 1250ns and a chip enable hold time of around 750ns ( I'm not quite sure of the timings right now and I know I am missing some timing information for some of the x8 parallel SRAM signals ). I plan on doing this with an ultra-low-power MCU, but, I'd need to use cycle-stretching on the Cypress F-RAM device(s). Is the above kind of conversion doable, especially the cycle stretching?

( N.B. The devices I want to use are one of these : https://www.cypress.com/file/444186/download , https://www.cypress.com/file/444186/download )

Thanks,

jdb2

Although ota2 files exist for platform/MCU/STM32F4xx/GCC/STM32F469, I've discovered then read on this site that there is insufficient RAM on the STM family e.g. 384K vs 640K as indicated by the diagram in WICED OTA2 pdf 2.1.2 OTA2 RAM Requirements.

The code size isn't the culprit but the loosing of 200K+ of SRAM.  I tracked it down to:

WICED/platform/MCU/STM32F4xx/GCC/STM32F469/ota2_memory_with_bootloader.ld

/*SRAM             (rwx) : ORIGIN = 0x20000000, LENGTH = 96K*/

SRAM             (rwx) : ORIGIN = 0x20000000, LENGTH = 320K

BTLDR_SRAM       (rwx) : ORIGIN = 0x2004BC00, LENGTH = 17k      /* Boot loader stack at the end. */

/*BTLDR_SRAM       (rwx) : ORIGIN = 0x20010000, LENGTH = 32k      / * Boot loader stack at the end. */

Thanks!