Hi,

Can we just implement TPS25982 block diagram to PSoC5LP MCU. I am attaching the link for datasheet of TPS25982 and the functional block diagram

 https://www.ti.com/lit/ds/symlink/tps25982.pdf?ts=1611299035488&ref_url=https%253A%252F%252Fwww.google.com%252F

Page No:18

Please do let me know in full brief about the different blocks.

Hello，

I am learning PSoC6 from the PSoC6 101 video tutorial series . From the PSoC 6 - 1-1-Introduction Alan Hawse told that PSoC6 chapters contains 4 parts.
I have downloaded the 1st,2nd and 3rd parts. And the last part is "connecting with WiFi & Cloud services".And I do not know the hyperlink of it. How can I get it?
Thanks in advance.

Hello,

  We have custom board with a 43012 connected via SDIO to a Xilinx ZynqMP.    We are using the latest Xilinx release which run the 5.4.0 kernel.   Based on information in the v5.4.18-2020_0625 version of the backport driver and cypress-yocto-scripts I have added support into yocto to build everything.

  I am using the following firmware/nvram files:

BCM43012C0_003.001.015.0102.0141.1LV.hcd*  brcmfmac43012-sdio.1LV.txt  cyfmac43012-sdio.bin  cyfmac43012-sdio.clm_blob

I get the timeout error so the wlan0 interface is never created.

Based on the kernel logs the chip is powered up and the driver can talk to it.

================================================================

[   12.985101] brcmfmac: brcmf_sdio_kso_init Enter

[   12.985117] brcmfmac: brcmf_sdio_drivestrengthinit No SDIO driver strength init needed for chip BCM43012/2 rev 2 pm0

[   12.985353] brcmfmac: brcmf_sdio_probe completed!!

[   12.985359] brcmfmac: brcmf_fw_alloc_request: using cypress/cyfmac43012-sdio for chip BCM43012/2

[   12.994144] brcmfmac: brcmf_fw_get_firmwares enter: dev=mmc1:0001:1

[   12.994149] brcmfmac: brcmf_ops_sdio_probe F2 init completed...

[   12.994254] usbcore: registered new interface driver brcmfmac

[   13.000643] brcmfmac: brcmf_fw_complete_request firmware cypress/cyfmac43012-sdio.bin found

[   13.000692] brcmfmac mmc1:0001:1: Direct firmware load for cypress/cyfmac43012-sdio.xlnx,zynqmp.txt failed with err2

[   13.011657] brcmfmac: brcmf_fw_complete_request firmware cypress/cyfmac43012-sdio.txt found

[   13.011662] brcmfmac: brcmf_fw_request_nvram_done enter: dev=mmc1:0001:1

[   13.011690] brcmfmac: brcmf_nvram_handle_key warning: ln=33:col=10: '=' expected, skip invalid key entry

[   13.011788] brcmfmac: brcmf_fw_request_nvram_done nvram 00000000d6229003 len 2356

[   13.011796] brcmfmac: brcmf_sdio_clkctl Enter

[   13.011798] brcmfmac: brcmf_sdio_htclk Enter

[   13.011849] brcmfmac: brcmf_sdio_htclk CLKCTL: turned ON

[   13.011852] brcmfmac: brcmf_sdio_clkctl 1 -> 3

[   13.011856] brcmfmac: brcmf_sdio_download_firmware firmware rstvec: 0

[   13.011858] brcmfmac: brcmf_sdio_download_code_file Enter

.

.

[   13.070357] brcmfmac: brcmf_sdio_download_nvram Enter

[   13.070399] brcmfmac: brcmf_sdiod_ramrw write 2356 bytes at offset 0x000076cc in window 0x00098000

[   13.070581] brcmfmac: brcmf_sdio_verifymemory Compare RAM dl & ul at 0x0009f6cc; size=2356

[   13.070586] brcmfmac: brcmf_sdiod_ramrw read 2048 bytes at offset 0x000076cc in window 0x00098000

[   13.070711] brcmfmac: brcmf_sdiod_ramrw read 308 bytes at offset 0x00007ecc in window 0x00098000

[   13.070755] brcmfmac: brcmf_chip_set_active Enter

[   13.071159] brcmfmac: brcmf_sdio_clkctl Enter

[   13.071161] brcmfmac: brcmf_sdio_htclk Enter

[   13.071177] brcmfmac: brcmf_sdio_htclk CLKCTL: turned OFF

[   13.071180] brcmfmac: brcmf_sdio_clkctl 3 -> 1

[   13.071185] brcmfmac: brcmf_sdio_clkctl Enter

[   13.071187] brcmfmac: brcmf_sdio_htclk Enter

[   14.072857] brcmfmac: brcmf_sdio_htclk: HT Avail timeout (1000000): clkctl 0x50

[   14.080236] brcmfmac: brcmf_sdio_clkctl 1 -> 1

[   14.080244] brcmfmac: brcmf_sdio_firmware_callback failed: dev=mmc1:0001:1, err=0

[   14.080268] brcmfmac: brcmf_ops_sdio_remove Enter

======================================================================

It appears that the firmware is loaded and the nvram.  However, after the nvram is loaded and this code from brcmf_sdio_htclk is executed I get the timeout error.

/* Otherwise, wait here (polling) for HT Avail */

timeout = jiffies +

  msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);

while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {

  clkctl = brcmf_sdiod_readb(bus->sdiodev,

   SBSDIO_FUNC1_CHIPCLKCSR,

   &err);

  if (time_after(jiffies, timeout))

    break;

  else

   usleep_range(5000, 10000);

  }

  if (err) {

    brcmf_err("HT Avail request error: %d\n", err);

    return -EBADE;

  }

  if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {

    brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",

      PMU_MAX_TRANSITION_DLY, clkctl);

   return -EBADE;

}

It looks like the the code is trying to re-initialize certain things after loading the nvram and what looks like a status register, SBSDIO_FUNC1_CHIPCLKCSR, has an error it it.

Any ideas of what could be happening here?  Is this process trying to switch from an internal to external clock?   We do have an external osc. connected to EXT_LPO.  I know it's unlikely, but is there any available documentation that would describe SBSDIO_FUNC1_CHIPCLKCSR?

thanks

jeff

Hello,

I am using PSOC6 PROTOTYPEKIT BOARD 。
I am using a Verilog file for DS18B20 testing (I got it from a test in Altera Cyclone IV and it works well). But the file cannot be built in PSOC Creator 4.3
The Screenshot in PSOC Creator 4.3.

The errors occurred in building
It seems that the PSOC Creator 4.3 cannot interpret the line 171

Can't handle expression 'Z' in the final equation for 'org_data(0)'.

And I do not know how to solve it.

And I wonder whether the Verilog syntax in PSOC Creator 4.3 is just a subet of the Verilog syntax in general.

Thanks in advance.

I checked the datasheet and website in search of ESD information and could not find any specific to P/N S25FL064LABNFI011. I would like to obtain ESD Voltage Rating Information for HBM per JEDEC JS-001 and CDM per JEDEC JESD22-C101 on the following device P/N S25FL064LABNFI011. Thanks.

I am looking through the datasheet and website information regarding the technology used in P/N S25FL064LABNFI011, but not able to find anything. Can you please advise, is this part CMOS, Bipolar, BiCMOS, or other?

Hi All.

Our customer going to make Audio device through CYBT-343026-01.
Can i embody A2DP in the Non-OS through CYBT-343026-01?
And Can distribute with Firmware form possible?

Please check this question.

Thank you.

Hi, What is the absolute max junction temperature and max recommended operating junction temperature of S29GL512S10TFI02 (industrial) and S29GL512S10TFV02 (industrial plus)?  Both are TSOP-56 package.  The datasheet gives max Ta  (ambient operating temperature) but does not give max rated junction temperature Tj.  Thanks,

Good morning,

how you can see on attached file, I would to pilot 10 7-segment displays with LED_Driver block.

I can't use a second LED_Driver because the 7-segment are commons and Creator give me an error.

Is there a way to use LED_Driver block with 10 commons?

Thanks for all your helps.
Mattia Scricciolo

Hi

I am using PSoC-6 as SPI slave to send data to master (PC).

Description of Cy_SCB_SPI_WriteArrayBlocking() says: When in the slave mode, writing data into the TX FIFO does not start an SPI transfer. The data is loaded in the TX FIFO and will be sent to the master on its request.

Does the PSoC slave SPI sends data once it receives the clock from the bus master ? or does it respond when the master asserts the slave_select ?

thanks