On an STM32F4 based board...

When hitting ota2_bootloader.c::ota2_failsafe_app_load() the entry point is a flash address  0x800c3e5 but it hasn't been loaded into internal flash from SFlash.   I see ota2_failsafe_app_load() erasing (internal?) flash:

/* Erase the application area */
result = ota2_failsafe_app_area_erase( flash_location, &header );

Then reading into RAM from flash:

result = ota2_failsafe_app_read( flash_location, (uint8_t*)prog_header.physical_address, prog_header.data_offset, prog_header.data_size_in_file );

But danged if it's obvious how internal flash get's written!  It is quite clear in wiced_waf_common.c::wiced_waf_app_load():

result = platform_load_app_chunk( app_header_location, offset, (void*) prog_header.physical_address, prog_header.data_size_in_file );

Thanks!

Geoff

Hi Cypress community,

We have a host CCG3PA PD controller (DFP) connected to a second (UFP) PD controller via a USB-C cable with an embedded  EMCA chip (CMG1). Normally, when the CCG3PA is plugged into the UFP PD controller with this cable, CCG3PA can read the data from the EMCA (CMG1) chip, as well as communicate with the UFP PD controller over CC wire.

However, if CCG3PA is plugged into the CMG1 EMCA cable only (so no UFP device connected on the other side), is it possible that CCG3PA can read the data from the CMG1 EMCA chip without an UFP present? I tried this setup with the Cypress PD Analyzer, but I didn’t see any CC packet exchanged.

Thanks,
Jonathan

Hi,

We are communicating using the UART(SCB) of PSoC4S.

The UART settings are as follows :

-- Mode:Standard

-- RX+TX

-- 19200bps(Actual 19231bps)

-- 8bit data length

-- Non parity

-- Stop bit 1

-- Oversampling 12

Therefore, we would like to detect two types of communication errors.

(1) Detection of parity bit of data transmitted to PSoC4S.

We understand that PSoC Creator enables Uart Advanced tab's RX parity error check when parity is present(Even/Odd).

However, it cannot be set when no parity is selected.

Is there a way to detect the value of the destination parity bit?

(2) Detection of different data lengths
When the reception setting of PSoC4S is 8bit data length, We would like to detect the case where the data sent from the destination is 7bit data length.

Regards,

I'm trying to program a Psoc6 using "Cypress Programmer 3.0". 

When I try this software with a PROTO-062-4343W it works fine, but on my board, it doesn't. My board has a different MCU.

After I connect the KitProg3 to my board. I do a "Reload Regions" to eliminate some of the errors. I can do a "Verify" and it works fine (effectively find differences or success if I change the file).. but when I do "Program" I get this errors:

Info : cyp status: OK

Info : ** Verified OK **

Info : cyp_get_mpn

Info : ** Detected device PN: CY8C6247BZI-D54 SiliconID: E206 Revision: 23 FamilyID: 100 DIE: PSoC6ABLE2

Info : program_device "/Debug/mtb-example-psoc6-hello-world.hex" "0"

Info : ** Program image /Debug/mtb-example-psoc6-hello-world.hex offset:0 **

Info : kitprog3: acquiring PSoC device...

Info : target halted due to debug-request, current mode: Thread

Info : xPSR: 0x01000000 pc: 0x00001f34 msp: 0x080477a8

Info : ** Device acquired successfully

Info : ** psoc6.cpu.cm4: Ran after reset and before halt...

Info : target halted due to debug-request, current mode: Thread

Info : xPSR: 0x61000000 pc: 0x1600400c msp: 00000000

Info : ** Programming Started **

Info : auto erase enabled

Info : Flash write discontinued at 0x10001894, next section at 0x10002000

Info : Padding image section 0 at 0x10001894 with 364 bytes (bank write end alignment)

Info : [ 53%] [################ ] [ Erasing ]timeout waiting for algorithm, a target reset is recommended

Info : SROM API execution failed. Status: 0x080008B4

Info : failed erasing sectors 0 to 12

Error: cyp status: ERROR

Info : Program device failed

Error: C:/Program Files (x86)/Cypress/Cypress Programmer 3.0/./scripts/cyp_base_default.tcl:38: Error: ** Programming Failed **

Error: in procedure 'program_device'

Error: at file "C:/Program Files (x86)/Cypress/Cypress Programmer 3.0/./scripts/cyp_base_default.tcl", line 38

Info : cyp_get_mpn

Info : ** Detected device PN: CY8C6247BZI-D54 SiliconID: E206 Revision: 23 FamilyID: 100 DIE: PSoC6ABLE2

Seems like an error on a script:

scripts/cyp_base_default.tcl", line 38

If I use ModusToolbox, I'm able to program my device with no problems... I just want to use "Cypress Programmer" so that someone else can program my boards without needing the source code and having ModusToolbox.

Thanks!

I'm migrating our setup to the new cybt bluetooth config format for CYW920721B2EVK-02 and CYBT-483062-EVAL targets, and I couldn't find any examples in the Cypress open source examples for GFPS (google fast pair service). We started with this app example:
https://github.com/cypresssemiconductorco/mtb-example-btsdk-audio-headset-speaker

Is there any chance you have it implemented internally somewhere and could share a sample cybt file with GFPS? It would save me a lot of time.

hi,

i found  a problem  using the rx hw fifo buffer,

if i read a byte from the fifo and in that exact time anew byte is recived the data i read i corrupted.

is there any way to read the fifo without that problem?

thanks.

Hi, the blog info, which was quite useful, seems to have been removed.

Would it be possible to create a HTML file of all the content for users to access or download ?

https://www.cypress.com/blog/psoc-sensei-blog

Regards, Dana.

Hello, 

I am pretty new to Cypress boards. Is it possible to use bluekitchen/btstack with the CYW920819EVB-02 over UART? I see support for older boards but not this one.

Thanks.

Hi,

I am trying to change GNU GCC toolchain things like the compiler optimization level, the stack and heap sizes, and use compiler command line options like -fstack-usage for analyzing task stack size use in FreeRTOS, but MTB 2.2 Eclipse IDE seems to have removed the "Tool Settings" tab from the project build settings, where it was present in prior versions of ModusToolBox. See my attached screenshot.

Is there a way to expose this tab again? I know I can manually edit the stack and heap sizes from the startup.S file or invoke the compiler from the command line, but I'd like to be able to build using the IDE with all these settings saved in the project as it is much more maintainable that way.

Thanks!