dmaConfig.cb = CyFxUartLpDmaCallback

the CyFxUartLpDmaCallback can not be called for uart rx dma of mode when the rx receive data.The code is as follows：

CyU3PReturnStatus_t
CyCx3AppDebugInit (void)
{
CyU3PUartConfig_t uartConfig;
CyU3PDmaChannelConfig_t dmaConfig;
CyU3PReturnStatus_t status = CY_U3P_SUCCESS;

/* Initialize the UART module */
status = CyU3PUartInit ();
if (status != CY_U3P_SUCCESS)
{
/* Error handling */
CyCx3AppErrorHandler(status);
}

/* Configure the UART
Baudrate = 115200, One stop bit, No parity, Hardware flow control enabled.
*/
CyU3PMemSet ((uint8_t *)&uartConfig, 0, sizeof(uartConfig));
uartConfig.baudRate = CY_U3P_UART_BAUDRATE_115200;
uartConfig.stopBit = CY_U3P_UART_ONE_STOP_BIT;
uartConfig.parity = CY_U3P_UART_NO_PARITY;
uartConfig.flowCtrl = CyFalse;
uartConfig.txEnable = CyTrue;
uartConfig.rxEnable = CyTrue;
uartConfig.isDma = CyTrue; /* DMA mode */

/* Set the UART configuration */
status = CyU3PUartSetConfig (&uartConfig, CyFxUartLpDmaCallback);
if (status != CY_U3P_SUCCESS )
{
/* Error handling */
CyCx3AppErrorHandler(status);
}

/* Create a DMA Manual channel between UART producer socket
and UART consumer socket */
CyU3PMemSet ((uint8_t *)&dmaConfig, 0, sizeof(dmaConfig));
dmaConfig.size = 16;
dmaConfig.count = 2;
dmaConfig.prodSckId = CY_U3P_LPP_SOCKET_UART_PROD;
dmaConfig.dmaMode = CY_U3P_DMA_MODE_BUFFER;
dmaConfig.notification = CY_U3P_DMA_CB_PROD_EVENT;
dmaConfig.cb = CyFxUartLpDmaCallback;
dmaConfig.prodHeader = 0;
dmaConfig.prodFooter = 0;
dmaConfig.consHeader = 0;
dmaConfig.prodAvailCount = 0;

/* Create the channel */
status = CyU3PDmaChannelCreate (&glUartRxChHandle,
CY_U3P_DMA_TYPE_MANUAL, &dmaConfig);
if (status != CY_U3P_SUCCESS)
{
/* Error handling */
CyCx3AppErrorHandler(status);
}

/* Set UART Tx and Rx transfer Size to infinite */
status = CyU3PUartRxSetBlockXfer(0xFFFFFFFF);
if (status != CY_U3P_SUCCESS)
{
/* Error handling */
CyCx3AppErrorHandler(status);
}

/* Set DMA Channel transfer size */
status = CyU3PDmaChannelSetXfer (&glUartRxChHandle, 0);
if (status != CY_U3P_SUCCESS)
{
/* Error handling */
CyCx3AppErrorHandler(status);
}

/* Initialize the debug application */
status = CyU3PDebugInit (CY_U3P_LPP_SOCKET_UART_CONS, 8);
if (status != CY_U3P_SUCCESS)
{
return status;
}

CyU3PDebugPreamble (CyFalse);

}

void CyFxUartLpDmaCallback (
CyU3PDmaChannel *chHandle, /* Handle to the DMA channel. */
CyU3PDmaCbType_t type, /* Callback type. */
CyU3PDmaCBInput_t *input) /* Callback status. */
{
CyU3PReturnStatus_t status;
gUartRecDataFlag = CyFalse;
if (type == CY_U3P_DMA_CB_PROD_EVENT)
{
/* This is a produce event notification to the CPU. This notification is
* received upon reception of every buffer. The buffer will not be sent
* out unless it is explicitly committed. The call shall fail if there
* is any application error. */

input->buffer_p.buffer[input->buffer_p.size] = '\0';
CyU3PDebugPrint (4, "%s", input->buffer_p.buffer);

status = CyU3PDmaChannelDiscardBuffer (chHandle);

if (status != CY_U3P_SUCCESS)
{
CyCx3AppErrorHandler (status);
}
}
}

The serial IO configuration is correct and the connection is correct. I've tested TX, Rx in register mode.Now I want to use DMA to receive data。but the the Callback function can not be called for uart rx dma of mode when the rx receive data.

Hello

  Please tell me how to configure I2S Driver with 2 Tx Channel and 1 Rx Channel.

  My chip : CYT4BF.

Thank you.

Hi 

I have a custom board with CYUSB3014-BZXC interfaced with Xilinx ultrascale  fpga for which I am facing some issue with gpif interface. I have the a working gpif inteface on a previous board in which  CYUSB3014-BZXC is interfaced with Xilinx artix fpga. In the new board with ultrascale , i am reusing the fx3 image and the fpga code ( fx3 interface part is same). However when I do a slave read with GPIF interface , I see that the FX3 is not receiving the data from the FPGA. I have probed on the data lines and pclock  signals. Clock is fine at 100MHz and data is also coming out of the FPGA. Other signals like SLCS, SLWR,SLRD,address , pktend etc are also in their expected state. I am doing a 16384 length transfer and the watermark is kept at 16380. However i note that both FlagA and FlagB are staying high throughout and not going to 0. I have a doubt that the Fx3 fifo pointer is not getting incremented or the GPIF state machine is somehow stuck. I do not have access to UART pins. They are connected to the FPGA. Any pointers as what might be happening will be really helpful.

Thanks and regards

Nithin

I am trying to compile a C/C++ makefile project using the Eclipse IDE for ModusToolbox (Version:  2.2.0, Build ID: 2181) for CY8CKIT-062-BLE  target.  I am able to compile  *.c and *.cpp files but *.cc files  is excluded from the compilation.

If I add following in the Makefile:

SOURCES = $(wildcard extlib/*.cc) 

The build console displays following error message:

../mtb_shared/core-make/latest-v1.X/make/core/build.mk:386: *** Incompatible source file type encountered while constructing explicit rule: extlib/utils.cc. Stop.

Hello all,

I want to integrate a python script/python-converted-exe(using pyinstaller --onefile <file.py>) in the Makefile.

The python script/exe works fine when using it as a stand-alone unit. However, when I try to integrate the exe in the Makefile and try building the application (snip.pers-BCM943909WCD1_3.B1-ThreadX-NetX_Duo-debug ota2_download), I get the following error:

[11816] INTERNAL ERROR: cannot create temporary directory!
make.exe[2]: *** [main_app] Error -1
make.exe[1]: *** [bootloader] Error 2
make.exe[1]: *** Waiting for unfinished jobs....
WICED/platform/MCU/BCM4390x/BCM94390x_targets.mk:256: recipe for target 'bootloader' failed
[10200] INTERNAL ERROR: cannot create temporary directory!
make.exe[2]: *** [main_app] Error -1
tools/makefiles/wiced_apps.mk:348: recipe for target 'sflash_write_app' failed
make.exe[1]: *** [sflash_write_app] Error 2
make: *** [main_app] Error 2
Makefile:359: recipe for target 'main_app' failed

Additional Info:

I want to merge certain output build files together to create one consolidated file : "merge_file.bin". The script is developed on Python 2.7.2. I converted the python script to an exe so that it is independent of system it is running on.

The purpose of integrating this script/exe in the Makefile is simple: after the binaries are successfully built, the script/exe will take the required files post-build and merge them together to produce a "merge_file.bin" .

Added Lines in the MAKEFILE:

1. Defined the exe with correct location:

MERGE_FILE = $(SOURCE_ROOT)merge_file.exe

2. Integration with MAKEFILE:

main_app: (some code)

$(QUIET)$(ECHO) Build complete
[line added]   $(QUIET)$(ECHO) Merging files...
[line added]  $(QUIET)$(MERGE_FILE)

In case anyone has worked on/ has knowledge on the same, please guide me on where I am going wrong and help me integrating the python script/python-converted-exe in the Makefile.

usb device work wrong under static electricity test in 6kv.   when device works wrong , we cant get any uvc or cdc-uart data in bushound, but down channel still works well at the same time.  and then the device can return to normal state after reconnect and without poewroff.  i want to make sure what will make this and if any useful state can be used to help solve it？

Hi Support Team,

I build a project in Modus ToolBox2.2  about SAR ADC.    I will enable hardware averaging :

1  The following three configuration options are not covered in the initialization code, and using code as an example, can you explain the meaning of each in detail.

"Sequential,Sum"

"Sequential,Fix"

"Interleaved,Sum"

2 What are the APIs involved in this feature?

Thanks!

Dear Yatheesh,

Sorry to bother you again.

After the last /RD signal problem was solved, no more underrun error.

But recently, all system combined test, I received error "No error : 18" from CY3014 uart port ,then, Xfer to FPGA failed.

Please kindly advise what is "No error : 18" ?

BR

Steven.

Hello,

When a power interruption occurs during Em_EEPROM_Write processing, the corresponding Row may be filled with 0xFF. In this state, Em_EEPROM_Init processing might not be returned after PSoC4 is restarted. I can't find any process in Em_EEPROM_Init that causes an infinite loop.

The configuration of EEPROM is as follows.
- Component v2.20
- Size: 64 bytes (actual size: 128 bytes)
- Redundant Copy: No
- Wear Level Factor: No

KBA228069 patch is not applied to the project of PSoC Creator yet. It mentions the FindLastWrittenRow function called in Em_EEPROM_Init. Will adding this patch avoid an infinite loop?

Best regards,

Hello:

I'm trying to flash a ARS6501 device (PSoC CY8c4147azi-s445 inside) using CMSIS-DAP and PSoC Programmer 3.29.0

The SWD adapter is detected by the programmer, however, the device is never acquired. I tried multiple times, with different CMSIS-DAP versions (v1, v1.1 and v2.0) but none worked! I always get "FAILED! PSoC device is not acquired! Check connection of the chip to the programmer..." error.

I checked all connections many times, and also probing the signals with the scope and I can see RST, SWCLK and SWDIO toggling trying to get response from device, but no luck so far... Only thing I notice is RST pulse is only 50ns, which seems to be small compared to what the PSoC Programming Specification states; however, I don't see how to actually change this as it's supposed to be handle by the programmer software.

Also tried two devices with same behavior so I don't think it's the device.

So my question is; it's really possible to acquire the device using CMSIS-DAP?

Thanks in advance;

Gus