The CAN receive call back for basic mailboxes doesn't tell the related mailbox.

I can add my own code to fix the problem but wouldn't it make sense to add the parameter to the call back?

Without the parameter rxMailbox you need to search for the mailbox again.

/*******************************************************************************

* FUNCTION NAME:   CAN_LS_ReceiveMsg

********************************************************************************

*

* Summary:

*  This function is the entry point to Receive Message Interrupt for Basic

*  mailboxes. Clears the Receive particular Message interrupt flag. Generated

*  only if one of the Receive mailboxes is designed as Basic.

*

* Parameters:

*  rxMailbox: The mailbox number that trig Receive Message Interrupt.

*

* Return:

*  None.

*

* Reentrant:

*  Depends on the Customer code.

*

*******************************************************************************/

void CAN_LS_ReceiveMsg(uint8 rxMailbox)

{

    #if (CY_PSOC3 || CY_PSOC5)

        if ((CAN_LS_RX[rxMailbox].rxcmd.byte[0u] & CAN_LS_RX_ACK_MSG) != 0u)

    #else  /* CY_PSOC4 */

        if ((CAN_LS_RX_CMD_REG(rxMailbox) & CAN_LS_RX_ACK_MSG) != 0u)

    #endif /* CY_PSOC3 || CY_PSOC5 */

        {

            /* `#START MESSAGE_BASIC_RECEIVED` */

            /* `#END` */

            #ifdef CAN_LS_RECEIVE_MSG_CALLBACK

                CAN_LS_ReceiveMsg_Callback();        // here the parameter "rxMailbox" is missing

            #endif /* CAN_LS_RECEIVE_MSG_CALLBACK */

            #if (CY_PSOC3 || CY_PSOC5)

                CAN_LS_RX[rxMailbox].rxcmd.byte[0u] |= CAN_LS_RX_ACK_MSG;

            #else  /* CY_PSOC4 */

                CAN_LS_RX_CMD_REG(rxMailbox) |= CAN_LS_RX_ACK_MSG;

            #endif /* CY_PSOC3 || CY_PSOC5 */

        }

}

Hello,

My host is connected to a PSOC that contains a USBUART. 

Upon PSOC boot completion, the PC has a new COM23. 

On the PSOC side I used the following code to initialize:

USBUART_1_Start(USBFS_DEVICE, USBUART_1_5V_OPERATION);    
while(USBUART_1_GetConfiguration() ==0);
USBUART_1_CDC_Init();

On the PC, COM23 is configured to 115200[baud], 8 (data bits), 1(stop bit). 

I succeeded to send a packet to the PSOC and get a reply from the PSOC. 

But it seems the rate is quite low. 

Example: I sent 28 bytes to the PSOC and got 36 bytes from PSOC. 
Expected: (28 + 36) * 8 = 64 bytes = 512 bits
The time required to send + receive should be: ~4.5msec
Actual: The elapsed time till I got a reply was much longer. 

Is it possible to improve the performance ?

Thank you,

Zvika 

I am getting the error as in the image attached,using Miniprog4 for flashing(CYT2B98CA) it not sure why i am getting this error,It will be great if anyone can support to fix the error.

Dear All:

There is a I2C mater and several slaves with the same address so I need a mux to determine which slave device i want to control. And i use analog mux in the CY8CKIT-059 kit to implement  my purpose.

p1[2] is SDAT source signal from master

p3[1] is connected to SDAT0 of slave device_0

p3[4] is connected to SDAT1 of slave device_1

as attached p1 shows.

and then I found it didn't work. So i took a measurement using scop as attached p2 shows.

channl4(green color) is clock from master

ch1(yellow) is measured by p1[2]

ch2(blue) is measured by  p3[1] .

ch1 and ch2 should get the same signal when using analog mux as their connection bridge, but they don't.

how do i solve the issue?

Thank you.

by the way, all of my pins' type setting is "analog", drive mode is "high impedance analog". 

Hi！

I have a  problem。

In M4 Core ，I use Cy_Flash_BlankCheck to check the address，the function return CY_FLASH_DRV_FLASH_NOT_ERASED。But I read the address，it will go the hardfault。

code：

uint32_t  ReadWFlashU32 (uint32_t add)

{

    uint32_t ret;

    cy_stc_flash_blankcheck_config_t blankCheckConfig;

   blankCheckConfig.addrToBeChecked = (uint32_t*)add;
   blankCheckConfig.numOfWordsToBeChecked = 0x1u;

   if ( CY_FLASH_DRV_FLASH_NOT_ERASED == Cy_Flash_BlankCheck(NULL, &blankCheckConfig,    CY_FLASH_DRIVER_BLOCKING))

   {
        ret = (*(uint32_t *)add); 
   }

   else
   {
        ret = 0x00000000uL;
    }

    return (ret);

}

Hi,

I have two questions about fx3.

Q1: When the CPU is done by software CPU resets(not whole device reset) , are the status of all I/O pins retained?

Q2: What is the maximum current consumption in the following cases?
　1.current consumption while RESET# is Low
　2.current consumption during RESET RECOVERY TIME

Regards,

Nagata.

Hi, 

I am referring to the below examples to test BLE Bonding between two pioneer kits.

https://github.com/Infineon/PSoC-4-BLE/blob/master/100_Projects_in_100_Days/Day015_Bonding/BLE_Bonding.pdf

https://github.com/Infineon/PSoC-4-BLE/blob/master/100_Projects_in_100_Days/Day011_Central_Observer/BLE_Central_Observer.pdf

Individually the examples work fine. But my requirement is: One pioneer kit should act as a BLE central and will connect to another pioneer kit that is acting as BLE peripheral. BLE peripheral is having below security requirements.

Connection with the peripheral using the Cysmart app works as expected. But how can I tweak the code on central to work with a peripheral with the above GAP settings?  Is there an example available for it?

I also have a requirement where I want to restrict the peripheral to be pared/bonded with just one central at a time.

Regards

Dear all,

I already own a CYW20706B2 Evaluation KIT. I want to connect it to an Audio codec and use the share-clock feature on CYW20706(GPIO BT_CLK_REQ/P4/P24) as MCLK (Master clock) for driving the Audio codec.

As i know, the default state of this GPIO is BT_CLK_REQ enabled, with double checking i can make sure that no more configurations for this GPIO in my project. However, when i connect the Logic Analyzer to pin 3 (J19) or pin 5 (J21) to visualize the output clock then nothing happen, there is no clock pulse. 

I would really appreciate if anyone could give me a hand on how to reconfigure this Share-clock feature.